Methods of selectively depositing silicon-containing films
View Patent ↗An embodiment provides a method for selectively depositing a single crystalline film. The method includes providing a substrate, which includes a first surface having a first surface morphology and a second surface having a second surface morphology different from the first surface morphology. A silicon precursor and BCl 3 are intermixed to thereby form a feed gas. The feed gas is introduced to the substrate under chemical vapor deposition conditions. A Si-containing layer is selectively deposited onto the first surface without depositing on the second surface by introducing the feed gas.
1. A method for selective depositing a single crystalline silicon film by chemical vapor deposition, the method comprising:
providing a substrate in a reaction chamber, the substrate comprising a first surface having a first surface morphology and a second surface having a second surface morphology different from the first surface morphology, wherein the first surface comprises a single crystalline region of a partially fabricated transistor and the second surface comprises an adjacent field isolation region;
intermixing a silicon precursor with BCl 3 to thereby form a feed gas;
exposing the substrate to the feed gas in the reaction chamber; and
selectively depositing a Si-containing layer onto the first surface of the substrate without depositing on the second surface by said exposing.
2. The method of claim 1 , wherein the silicon source is selected from the group consisting of silane, disilane, trisilane, tetrasilane, monochlorodisilane, dichlorodisilane, trichlorosilane, trichlorodisilane, neopentasilane, or a combination thereof.
3. The method of claim 1 , further comprising intermixing the silicon precursor and BCl 3 with a halogen-containing etchant to form the feed gas.
4. The method of claim 1 , further comprising intermixing the silicon precursor and BCl 3 with a germanium source to form the feed gas.
5. The method of claim 1 , wherein intermixing the silicon precursor and BCl 3 comprises flowing about 10 sccm to about 100 sccm of pure BCl 3 for a single wafer CVD chamber.
6. The method of claim 1 , wherein the Si-containing layer comprises an in situ doped silicon film.
7. The method of claim 1 , wherein the Si-containing layer comprises at least about 7×10 19 atoms cm −3 of boron as deposited.
8. The method of claim 1 , wherein the Si-containing layer has a resistivity of about 1.6 mΩ·cm or less.
9. The method of claim 1 , wherein the first surface comprises a source and drain region of the partially fabricated transistor.
10. The method of claim 1 , wherein the Si-containing layer comprises a heteroepitaxial film.
11. The method of claim 1 , further comprising intermixing a hydrogen carrier gas to form the feed gas.
12. The method of claim 1 , further comprising intermixing a non-hydrogen inert carrier gas to form the feed gas.
13. The method of claim 3 , wherein the halogen-containing etchant comprises HCl, and wherein intermixing the silicon precursor and BCl 3 with the etchant gas comprises flowing about 75 sccm to about 115 sccm of HCl for a single wafer CVD chamber.
14. The method of claim 4 , wherein the germanium source is germane, and wherein intermixing the silicon precursor and BCl 3 with the germanium source comprises flowing about 2 sccm to about 6.6 sccm of germane diluted in 10% H 2 for a single wafer CVD chamber.
15. The method of claim 9 , wherein the first surface is recessed relative to a channel surface of the partially fabricated transistor.
16. The method of claim 9 , wherein the Si-containing layer defines an elevated source/drain structure.
17. The method of claim 16 , wherein the Si-containing layer introduces compressive strain into the channel region.
18. A method of forming an integrated circuit, the method comprising:
providing a substrate including exposed semiconductor surfaces of a partially fabricated transistor and adjacent insulating regions and
exposing the substrate to a silicon precursor, BCl 3 and an etchant vapor, thereby selectively depositing a Si-containing epitaxial film on the exposed semiconductor surfaces.
19. The method of claim 18 , further comprising providing a germanium source to the substrate, so that the Si-containing film comprises a Si 1-x Ge x film, wherein 0<x≦1.
20. The method of claim 18 , wherein the Si-containing film comprises about 15% to about 25% Ge.
21. The method of claim 18 , wherein exposing selectively deposits the Si-containing film over the semiconductor surfaces while avoiding deposition over the insulating regions in a ratio of greater than about 50:1.
22. The method of claim 18 , wherein exposing selectively deposits the Si-containing film with 100% selectivity over the semiconductor surfaces while avoiding deposition over the insulating regions.
23. An apparatus configured for selective epitaxial deposition, the apparatus comprising:
a reaction chamber configured to support a substrate;
a source of semiconductor precursor in communication with the reaction chamber
a source of etchant vapor in communication with the reaction chamber;
a source of BCl 3 in communication with the reaction chamber; and
a controller adapted to simultaneously deliver semiconductor precursor, etchant vapor and BCl 3 from the sources to the reaction chamber in accordance with a selective deposition recipe to selectively deposit an epitaxial semiconductor film on single-crystal areas of a partially fabricated transistor on a patterned wafer in the reaction chamber without depositing on adjacent insulating areas.