IP Library Granted Patent US 8,090,980
Granted Patent B2
US 8,090,980 · App. 11/942,623 · Granted Jan 3, 2012

System, method, and computer program product for providing data redundancy in a plurality of storage devices

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Quick Facts
Patent No.
US 8,090,980
App. No.
11/942,623
Granted
Jan 3, 2012
Kind
B2
Abstract

A system, method, and computer program product are provided for providing data redundancy in a plurality of storage devices. In operation, storage commands are received for providing data redundancy in accordance with a first data redundancy scheme. Additionally, the storage commands are translated for providing the data redundancy in accordance with a second data redundancy scheme. Furthermore, the translated storage commands are outputted for providing the data redundancy in a plurality of storage devices.

Claims (38)

1. A method, comprising:

via a standard storage subsystem interface, receiving first storage commands from a computer and reducing a number of writes to produce second storage commands;

via a disk controller, receiving the second storage commands and producing third storage commands that are in accordance with a first data redundancy scheme to provide data redundancy;

translating the third storage commands in accordance with a second data redundancy scheme;

outputting the translated storage commands in a plurality of storage devices; and

avoiding randomization of data by providing the data redundancy after the reducing.

2. The method as recited in claim 1 , wherein the first data redundancy scheme includes a redundant array of independent disks (RAID)-1 data redundancy scheme.

3. The method as recited in claim 1 , wherein the second data redundancy scheme includes a redundant array of independent disks (RAID)-5 data redundancy scheme.

4. The method as recited in claim 1 , wherein the second data redundancy scheme includes a redundant array of independent disks (RAID)-6 data redundancy scheme.

5. The method as recited in claim 1 , wherein the storage devices include a mechanical storage device.

6. The method as recited in claim 5 , wherein the mechanical storage device includes a disk drive.

7. The method as recited in claim 1 , wherein the storage devices include a solid state storage device.

8. The method as recited in claim 7 , wherein the solid state storage device includes flash memory.

9. The method as recited in claim 8 , wherein the flash memory includes NAND flash memory.

10. The method as recited in claim 9 , wherein the NAND flash memory includes single-level cell (SLC) NAND flash memory.

11. The method as recited in claim 9 , wherein the NAND flash memory includes multi-level cell (MLC) NAND flash memory.

12. The method as recited in claim 7 , wherein the solid state storage device includes dynamic random access memory (DRAM).

13. The method as recited in claim 1 , and further comprising detecting a disconnection of a power source of the storage devices.

14. The method as recited in claim 13 , and further comprising providing power to the storage devices, in response to the detection of the disconnection of the power source.

15. The method as recited in claim 14 , wherein power is provided to the storage devices until at least a point when no data loss will occur as a result of the disconnection of the power source.

16. The method as recited in claim 15 , wherein the power is provided utilizing a capacitor.

17. The method as recited in claim 15 , wherein the power is provided utilizing a battery.

18. The method as recited in claim 1 , wherein the third storage commands are compatible with a Serial Attached SCSI (SAS) interface.

19. The method as recited in claim 18 , wherein at least one of the storage devices includes flash memory.

20. The method as recited in claim 1 , wherein one of the first data redundancy scheme or the second data redundancy scheme includes one of a redundant array of independent disks (RAID)-10 data redundancy scheme, a redundant array of independent disks (RAID)-50 data redundancy scheme, a redundant array of independent disks (RAID)-60 data redundancy scheme, and a square parity redundancy scheme.

21. A system, comprising:

standard storage subsystem interface means for receiving computer storage commands from a computer;

write reduction means for reducing a number of writes to produce write-reduced storage commands;

disk controller means for receiving the write-reduced storage commands from the write reduction means and producing data redundancy storage commands that are in accordance with a first data redundancy scheme to provide data redundancy;

translation means for translating the data redundancy storage commands in accordance with a second data redundancy scheme;

storage device interface means for outputting the translated storage commands in a plurality of storage devices; and

wherein the system is enabled to avoid randomization of data via receiving the write-reduced storage commands by the disk controller means from the write reduction means.

22. An apparatus, comprising:

a write reducing circuit enabled to receive computer storage commands from a computer and to reduce a number of writes to produce write-reduced storage commands;

a data redundancy circuit comprised in a disk controller and enabled to receive the write-reduced storage commands from the write reducing circuit and to produce data redundancy storage commands that are in accordance with a first data redundancy scheme to provide data redundancy;

a storage device circuit enabled to translate the data redundancy storage commands to storage device storage commands in accordance with a second data redundancy scheme and to provide the storage device storage commands to a plurality of storage devices; and

wherein the apparatus is enabled to avoid randomization of data via receiving the write-reduced storage commands by the data redundancy circuit from the write reducing circuit.

23. The apparatus as recited in claim 22 , and further comprising the storage devices.

Assignments (6)
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENT RIGHTS (RELEASES RF 032856-0031) Recorded Feb 2, 2016
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: LSI CORPORATION; AGERE SYSTEMS LLC
Reel/Frame 037684/0039 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 21, 2015
From: LSI CORPORATION
To: SEAGATE TECHNOLOGY LLC
Reel/Frame 034775/0777 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN CERTAIN PATENTS INCLUDED IN SECURITY INTEREST PREVIOUSLY RECORDED AT REEL/FRAME (032856/0031) Recorded Nov 6, 2014
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: LSI CORPORATION; AGERE SYSTEMS LLC
Reel/Frame 034177/0257 →
PATENT SECURITY AGREEMENT Recorded May 8, 2014
From: LSI CORPORATION; AGERE SYSTEMS LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 032856/0031 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 11, 2012
From: SANDFORCE, INC.
To: LSI CORPORATION
Reel/Frame 028938/0413 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 19, 2007
From: DANILAK, RADOSLAV
To: SANDFORCE, INC.
Reel/Frame 020141/0580 →