Random cache line refill
View Patent ↗A microprocessor including random cache line refill ordering to lessen side channel leakage in a cache line and thus thwart cryptanalysis attacks such as timing attacks, power analysis attacks, and probe attacks. A random sequence generator is used to randomize the order in which memory locations are read when filling a cache line.
1. A method for generating a random sequence to minimize side channel leakage during a cryptographic operation by a cryptographic device, the method, comprising:
(1) generating a mask value based on a logical OR of an initial mask value and an initial selection value;
(2) generating a random value;
(3) generating a selection value based on the mask value and the random value; and
(4) repeating steps (1) through (3) to form the random sequence, wherein steps (1) through (4) are performed by the cryptographic device.
2. The method of claim 1 , wherein step (4) comprises repeating steps (1) through (3) to form a random sequence of N selection values.
3. The method of claim 1 , wherein step (4) comprises repeating steps (1) through (3) to form a random sequence of N selection values, wherein no two selection values in the random sequence of N selection values are the same.
4. The method of claim 3 further comprising:
(5) generating, for each selection value generated in step (4), a bus operation.
5. The method of claim 3 , wherein the method is implemented in a processor, the method further comprising:
(5) generating, for each selection value generated in step (4), a data read request, wherein the order of the data read requests correspond to a generation order of the selection values.
6. A method for generating a random sequence to minimize side channel leakage during a cryptographic operation by a cryptographic device, the method, comprising:
(1) generating a mask value;
(2) generating a random value;
(3) generating a selection value based on the mask value and the random value, including a first bit of the selection value based on a logical NOT of a first bit of the mask value; and
(4) repeating steps (1) through (3) to form the random sequence, wherein steps (1) through (4) are performed by the cryptographic device.
7. A method for generating a random sequence to minimize side channel leakage during a cryptographic operation by a cryptographic device, the method, comprising:
generating a selection number based on a mask and a random value to form a random sequence of N selection values, wherein no two selection values are the same; and
using the selection values, translating between a plurality of ordered bus requests and a pseudo-random sequence of individually randomly-ordered sequence of bus operations.
8. The method of claim 7 , wherein the bus operations comprise the reading of instructions.
9. The method of claim 7 , wherein the plurality of bus operations comprise the reading of data.
10. A method for generating a random sequence to minimize side channel leakage during a cryptographic operation by a cryptographic device, wherein the method is implemented in a processor, the method, comprising:
(1) generating a mask value;
(2) generating a random value;
(3) generating a selection value based on the mask value and the random value;
(4) repeating steps (1) through (3) to form the random sequence; and
(5) generating, for each selection value generated in step (4), a data read request, wherein the order of the data read requests correspond to a generation order of the selection values.