Silicon wafer and method for manufacturing the same
View Patent ↗Silicon wafers and a process for their manufacture wherein both slip dislocation and occurrence of warpage are suppressed include heat treatment to provide wafers having plate-shaped BMDs, a density of BMDs whose diagonal lengths are in a range of 10 nm to 120 nm, of BMDs present in the bulk of the wafer at a distance of 50 μm or more is 1×10 11 /cm 3 or more, and the density of BMDs whose diagonal lengths are 750 nm or more in the wafer bulk is 1×10 7 /cm 3 or less, and the interstitial oxygen concentration is 5×10 17 atoms/cm 3 or less. The process involves low and high temperature heat treating at under defined temperature ramping rates.
1. A heat treated silicon wafer containing BMDs having a shape, exhibiting reduced occurrence of slips and warpage, and having an interstitial oxygen concentration of 5×10 17 atoms/cm 3 or less, comprising a wafer
a) wherein the shape of BMDs in the wafer is octahedral, and
the density of BMDs whose diagonal lengths are in a range of 10 nm to 50 nm in the bulk of the wafer at a distance of 50 μm or more from a wafer surface is 5×10 11 /cm 3 or more, and
the density of BMDs whose diagonal lengths are 300 nm or more in the bulk of the wafer at a distance of 50 μm or more from the wafer surface, is 1×10 7 /cm 3 or less,
b) both plate-shaped BMDs and octahedral BMDs are present, and
the density of octahedral BMDs whose diagonal lengths are in a range of 10 nm to 50 nm in the bulk of the wafer at a distance of 50 μm or more from the wafer surface is 5×10 11 /cm 3 or more, and
the density of plate-shaped BMDs whose diagonal lengths are 750 nm or more in the wafer bulk at a distance of 50 μm or more from the wafer surface, are 1×10 7 /cm 3 or less, or
c) the BMDs are plate-shaped, and
the density of BMDs whose diagonal lengths are in a range of 10 nm to 120 nm in the bulk of the wafer at a distance of 50 μm or more from the wafer surface is 1×10 11 /cm 3 or more, and
the density of BMDs whose diagonal lengths are 750 nm or more in the bulk of the wafer at a distance of 50 μm or more from the wafer surface, is 1×10 7 /cm 3 or less.
2. A method for manufacturing a silicon wafer according to a) of claim 1 , comprising heat treating the wafer with a heat treatment comprising
(A): a low temperature heat treatment conducted at a temperature of 600 to 750° C. for 30 minutes to 10 hours;
(B): a step of increasing the temperature to 1000° C. at a rate of 0.1 to 1° C./minute for 5 to 50 hours; and
(C): a high temperature heat treatment step conducted at a temperature of 1000° C. to 1250° C. such that the diffusion length of interstitial oxygen is in a range of 30 μm to 50 μm.
3. A method for manufacturing a silicon wafer according to a) of claim 1 , comprising heat treating the wafer with a heat treatment comprising
(A): a step of performing a heat treatment at a temperature between 600 and 750° C. for 30 minutes to 10 hours as a low temperature heat treatment step;
(B): a step of increasing the temperature to 800° C. at a rate of 0.1 to 1° C./minute for 1 to 20 hours as a temperature increasing step after the low temperature heat treatment step;
(C): a step of decreasing a furnace temperature at a rate of 1 to 10° C./minute, removing a substrate from the furnace at a furnace temperature between 600° C. to 800° C. and cooling the substrate down to room temperature; and
(D): a step of introducing the substrate into the furnace at a furnace temperature between 600° C. to 800° C. and ramping up to 1000° C. at a rate of 1 to 10° C./minute and performing a heat treatment at a temperature of 1000° C. to 1250° C. such that a diffusion length of interstitial oxygen is in a range of 30 μm to 50 μm as a high temperature heat treatment step.
4. A method for manufacturing the silicon wafer according to b) of claim 1 , wherein
the silicon wafer has a nitrogen concentration in a range of 5×10 14 atoms/cm 3 to 1×10 16 atoms/cm 3 , and heat treating the wafer by a heat treatment comprising
(A): a low temperature heat treatment conducted at a temperature of 600 to 750° C. for 30 minutes to 10 hours;
(B): a step of increasing the temperature to 1000° C. at a rate of 0.1 to 1° C./minute for 5 to 50 hours; and
(C): a high temperature heat treatment step performed at a temperature of 1000° C. to 1250° C. such that a diffusion length of interstitial oxygen is in a range of 30 μm to 50 μm.
5. A method for manufacturing the silicon wafer according to b) of claim 1 , wherein
the nitrogen concentration of the wafer is in a range of 5×10 14 atoms/cm 3 to 1×10 16 atoms/cm 3 , and
heat treating the silicon wafer by a heat treatment comprising:
(A): a step of performing a heat treatment at a temperature of 600° C. to 750° C. for 30 minutes to 10 hours as a low temperature heat treatment step;
(B): a step of increasing the temperature to 800° C. at a rate of 0.1 to 1° C./minute for 1 to 20 hours;
(C): a step of decreasing a furnace temperature at a rate of 1 to 10° C./minute, removing a substrate from the furnace at a furnace temperature between 600° C. to 800° C. and cooling the substrate down to room temperature; and
(D): a step of introducing a substrate into the furnace at a furnace temperature between 600° C. to 800° C. and ramping up to 1000° C. at a rate of 1 to 10° C./minute and performing a heat treatment at a temperature of 1000° C. to 1250° C. such that a diffusion length of interstitial oxygen is in a range of 30 μm to 50 μm as a high temperature heat treatment step.
6. A method for manufacturing the silicon wafer according to c) of claim 1 , comprising
heat treating the wafer by a heat treatment comprising
(A): a low temperature heat treatment for performing a heat treatment at a temperature of 600° C. to 750° C. for 10 minutes to 10 hours;
(B): a step of increasing the temperature to 1000° C. at a rate of 0.1° C./minute to 1 C.°/minute for 5 to 50 hours; and
(C): a high temperature heat treatment step conducted at a temperature of 1000° C. to 1250° C. such that a diffusion length of interstitial oxygen is in a range of 20 μm to 30 μm.
7. A method for manufacturing a silicon wafer according to c) of claim 1 , wherein
heat treating the wafer by a heat treatment comprising:
(A): a step of conducting heat treatment at a temperature of 600° C. to 750° C. for 10 minutes to 10 hours as a low temperature heat treatment step;
(B): a step of increasing the temperature to 800° C. at a rate of 0.1 to 1° C./minute for 1 to 20 hours as a temperature increasing step after the low temperature heat treatment step;
(C): a step including ramping down a furnace temperature at a rate of 1 to 10° C./minute, removing a substrate from the furnace at a furnace temperature between 600° C. to 800° C. and cooling the substrate down to room temperature; and
(D): a step including introducing a substrate into the furnace at a furnace temperature between 600° C. to 800° C. and ramping up to 1000° C. at a rate of 1 to 10° C./minute and performing a heat treatment at a temperature of 1000° C. to 1250° C. such that a diffusion length of interstitial oxygen is in a range of 20 μm to 30 μm as a high temperature heat treatment step.
8. The method for manufacturing a silicon wafer according to claim 6 , wherein
a nitrogen concentration in the substrate is in a range of 5×10 14 atoms/cm 3 to 1×10 16 atoms/cm 3 .
9. The method for manufacturing a silicon wafer according to claim 7 , wherein
a nitrogen concentration in the substrate is in a range of 5×10 14 atoms/cm 3 to 1×10 16 atoms/cm 3 .
10. The method for manufacturing a silicon wafer according to claim 2 , wherein
a carbon concentration in the substrate is in a range of 2×10 15 atoms/cm 3 to 3×10 16 atoms/cm 3 .
11. The method for manufacturing a silicon wafer according to claim 4 , wherein
a carbon concentration in the substrate is in a range of 2×10 15 atoms/cm 3 to 3×10 16 atoms/cm 3 .
12. The method for manufacturing a silicon wafer according to claim 5 , wherein
a carbon concentration in the substrate is in a range of 2×10 15 atoms/cm 3 to 3×10 16 atoms/cm 3 .
13. The method for manufacturing a silicon wafer according to claim 6 , wherein
a carbon concentration in the substrate is in a range of 2×10 15 atoms/cm 3 to 3×10 16 atoms/cm 3 .
14. The method for manufacturing a silicon wafer according to claim 9 , wherein
a carbon concentration in the substrate is in a range of 2×10 15 atoms/cm 3 to 3×10 16 atoms/cm 3 .
15. A silicon wafer of claim 1 , wherein the shape of BMDs in the wafer is octahedral, and
the density of BMDs whose diagonal lengths are in a range of 10 nm to 50 nm in the bulk of the wafer at a distance of 50 μm or more from a wafer surface is 5×10 11 /cm 3 or more, and
the density of BMDs whose diagonal lengths are 300 nm or more in the bulk of the wafer at a distance of 50 μm or more from the wafer surface, is 1×10 7 /cm 3 or less.
16. A silicon wafer of claim 1 , wherein both plate-shaped BMDs and octahedral BMDs are present, and
the density of octahedral BMDs whose diagonal lengths are in a range of 10 nm to 50 nm in the bulk of the wafer at a distance of 50 μm or more from the wafer surface is 5×10 11 /cm 3 or more, and
the density of plate-shaped BMDs whose diagonal lengths are 750 nm or more in the wafer bulk at a distance of 50 μm or more from the wafer surface, are 1×10 7 /cm 3 or less.
17. A silicon wafer of claim 1 , wherein the BMDs are plate-shaped, and
the density of BMDs whose diagonal lengths are in a range of 10 nm to 120 nm in the bulk of the wafer at a distance of 50 μm or more from the wafer surface is 1×10 11 /cm 3 or more, and
the density of BMDs whose diagonal lengths are 750 nm or more in the bulk of the wafer at a distance of 50 μm or more from the wafer surface, is 1×10 7 /cm 3 or less.