LINK POWER SAVING STATE
Disclosed are embodiments of a method, apparatus and system for a low power state for a point-to-point link. During the low power state, the signal on both conductors of a differential transmit pair are driven to electrical idle. Analog activity detectors are enabled during the low power state and are disabled during normal power state. Exit from the low power state does not require a physical layer re-initialization sequence. Other embodiments are also described and claimed.
1 . An apparatus, comprising:
a port comprising at least one transmitter lane and at least one receiver lane;
an activity detector to detect a predetermined activity on the receiver lane; and
a logical module to enable said activity detector during a low power state and to disable said activity detector during a normal power state.
2 . The apparatus of claim 1 , wherein:
the transmitter lane and the receiver lane each further comprise a differential pair of conductors.
3 . The apparatus of claim 2 , wherein:
the logical module is further to drive both conductors of the transmitter lane to electrical idle during the low power state.
4 . The apparatus of claim 3 , further comprising:
an electrical module that includes a plurality of circuits;
wherein the logical module is further to power down a subset of the plurality of circuits during the low power mode.
5 . The apparatus of claim 4 wherein:
the logical module is further to select the subset based on the wakeup time value.
6 . The apparatus of claim 1 , wherein:
each of said transmitter lane and said receiver lane are for uni-directional communication between said port and a second port.
7 . The apparatus of claim 1 , further comprising:
a register to hold a wakeup time value.