Semiconductor device, semiconductor system and semiconductor device manufacturing method
View Patent ↗A semiconductor device is provided with a first conductivity type semiconductor substrate ( 10 ); a voltage supplying terminal ( 26 ) arranged on the semiconductors substrate ( 10 ); one or more elements ( 6 ) which include a second conductivity type well section ( 22 ) and are arranged on the semiconductor substrate ( 10 ); a second conductivity type first conductive layer ( 21 ), which is a lower layer of the one or more elements ( 6 ), is in contact with the second conductivity type well section ( 22 ), and connects the second conductivity type well section ( 22 ) of the one or more elements ( 6 ) with the voltage supplying terminal ( 26 ); and a first conductivity type second conductive layer ( 11 ) formed in contact with a lower side of the first conductive layer ( 21 ).
1. A semiconductor device comprising:
a first conductivity type semiconductor substrate;
a voltage supply terminal provided on said semiconductor substrate;
one or more elements including a second conductivity type well portion and disposed on said semiconductor substrate;
a second conductivity type first conductive layer formed contiguously with said second conductivity type well portion under said one or more elements and connecting said second conductivity type well portion of said one or more elements to said voltage supply terminal;
a first conductivity type second conductive layer formed contiguously with a lower side of said second conductivity type first conductive layer;
a first conductivity type third conductive layer formed above said second conductivity type first conductive layer; and
one or more elements having said first conductivity type third conductive layer formed as a first conductivity type well portion,
wherein said first conductivity type third conductive layer is formed between said second conductivity type well portion and a connecting position of said voltage supply terminal to said second conductivity type first conductive layer, and
said second conductivity type first conductive layer connects said voltage supply terminal to said second conductivity type well portion under said first conductivity type third conductive layer.
2. The semiconductor device according to claim 1 , wherein a peak position of the impurity concentration distribution for forming said first conductivity type second conductive layer in a direction from an element side toward a lower layer exists lower than a peak position of an impurity concentration distribution of an impurity for forming said second conductivity type first conductive layer.
3. The semiconductor device according to claim 1 , wherein a concentration of the impurity for forming said first conductivity type second conductive layer is lower than a concentration of the impurity for forming said second conductivity type first conductive layer.
4. The semiconductor device according to claim 1 , wherein said second conductive layer is formed over substantially an entire surface of said semiconductor substrate.
5. A semiconductor system including a semiconductor device and a control device controlling said semiconductor device,
said semiconductor device comprising:
a first conductivity type semiconductor substrate;
a voltage supply terminal provided on said semiconductor substrate;
one or more elements including a second conductivity type well portion and disposed on said semiconductor substrate;
a second conductivity type first conductive layer formed contiguously with said second conductivity type well portion under said one or more elements and connecting said second conductivity type well portion of said one or more elements to said voltage supply terminal; and
a first conductivity type second conductive layer formed contiguously with a lower side of said second conductivity type first conductive layer;
a first conductivity type third conductive layer formed above said second conductivity type first conductive layer; and
one or more elements having said first conductivity type third conductive layer formed as a first conductivity type well portion,
wherein said first conductivity type third conductive layer is formed between said second conductivity type well portion and a connecting position of said voltage supply terminal to said second conductivity type first conductive layer,
wherein said second conductivity type first conductive layer connects said voltage supply terminal to said second conductivity type well portion under said first conductivity type third conductive layer, and
wherein said control device biases, when said element is in an non-active status, said second conductivity type first conductive layer with a first voltage in a direction opposite to a conductive direction via said voltage supply terminal, and biases, when said element is in an active status, said second conductivity type first conductive layer with a second voltage weaker than the first voltage via said voltage supply terminal.