IP Library Granted Patent US 7,835,124
Granted Patent B2
US 7,835,124 · App. 11/954,243 · Granted Nov 16, 2010

Short circuit and over-voltage protection for a data bus

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Quick Facts
Patent No.
US 7,835,124
App. No.
11/954,243
Granted
Nov 16, 2010
Kind
B2
Abstract

An apparatus for protecting a device against an over-voltage condition that is in excess of its breakdown voltage includes a detector for detecting the over-voltage condition and a protection circuit for protecting the device in response to detection of the over-voltage condition. The protection circuit may include a transmission gate and a PMOS transistor for producing a protection signal. The protection signal may be applied to a gate and/or a drain and/or a source and/or a well of the device such that a voltage across the device does not exceed the breakdown voltage. The protection signal may be derived from the over-voltage condition independent of whether a supply of power to the device is present.

Claims (27)

1. An apparatus for protecting a device against an over-voltage condition that is in excess of a breakdown voltage of the device, said apparatus comprising:

a detector for detecting said over-voltage condition; and

a protection circuit, connected to said detector, for protecting said device in response to said detector detecting said over-voltage condition,

wherein said detector includes a reference generator for generating at least one reference signal, a first maximum voltage selector connected to said reference generator, and an auxiliary voltage reference generator connected to said first maximum voltage selector for generating a signal (V scp ) indicating said over-voltage condition.

2. The over-voltage protection apparatus of claim 1 , wherein said detector includes a second maximum voltage selector following said auxiliary voltage reference generator for producing a first reference signal and a third maximum voltage selector following said second maximum voltage selector for producing a second reference signal.

3. The over-voltage protection apparatus of claim 1 , wherein said detector includes a short circuit flag module following said auxiliary voltage reference generator for producing a logical signal representing said over-voltage condition.

4. The over-voltage protection apparatus of claim 1 , wherein said at least one reference signal is applied to at least one of a gate, a drain, a source and a well of said device such that a voltage across said device does not exceed said breakdown voltage.

5. The over-voltage protection apparatus of claim 1 , wherein said at least one reference signal is derived from said over-voltage condition independent of whether a supply of power to said device is present.

6. The over-voltage protection apparatus of claim 1 , wherein said protection circuit includes at least one transmission gate and at least one PMOS device and wherein said transmission gate and said PMOS device are controlled to protect said device in response to said over-voltage condition.

7. The over-voltage protection apparatus of claim 6 , wherein said transmission gate and said PMOS device are controlled to pass a data signal during normal operation of said device and to pass at least one reference signal in response to said over-voltage condition.

8. The over-voltage protection apparatus of claim 1 , wherein said device includes at least one of a driver stage of a transmitter and an input stage of a receiver.

9. A method for protecting a device against an over-voltage condition that is in excess of its breakdown voltage, said method comprising:

detecting said over-voltage condition; and

protecting said device in response to detecting said over-voltage condition,

wherein said detecting step includes,

generating at least one reference signal,

selecting a first maximum voltage after generating said at least one reference signal, and

generating an auxiliary voltage reference signal using said first maximum voltage for indicating said over-voltage condition.

10. The method for protecting a device against an over-voltage condition of claim 9 , wherein said detecting step includes producing a first reference signal by selecting a second maximum voltage following generating said auxiliary voltage reference signal, and producing a second reference signal by selecting a third maximum voltage following selecting said second maximum voltage.

11. The method for protecting a device against an over-voltage condition of claim 9 , wherein said detecting step includes flagging said over-voltage condition following generating said auxiliary voltage reference signal by producing a logical signal representing said over-voltage condition.

12. The method for protecting a device against an over-voltage condition of claim 9 , wherein said at least one reference signal is derived from said over-voltage condition independent of whether a supply of power to said device is present.

13. The method for protecting a device against an over-voltage condition of claim 9 , further comprising:

applying said at least one reference signal to at least one of a gate, a drain, a source, and a well of said device such that a voltage across said device does not exceed said breakdown voltage.

14. The method for protecting a device against an over-voltage condition of claim 9 , wherein said protecting step includes controlling at least one transmission gate and at least one PMOS device to protect said device in response to said over-voltage condition.

15. The method for protecting a device against an over-voltage condition of claim 14 , further comprising:

controlling said transmission gate and said PMOS device to pass a data signal during normal operation of said device and to pass at least one reference signal in response to said over-voltage condition.

16. The method for protecting a device against an over-voltage condition of claim 9 , wherein said device includes at least one of a driver stage of a transmitter and an input stage of a receiver for a data line.

Assignments (26)
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040925 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Feb 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V. F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 052917/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040928 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Jan 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 052915/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 037486 FRAME 0517. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Dec 10, 2019
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 053547/0421 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 039361 FRAME 0212. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051029/0387 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 042985 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051029/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051030/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 042762 FRAME 0145. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051145/0184 →
RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 050745/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 050744/0097 →
CORRECTIVE ASSIGNMENT TO CORRECT THE TO CORRECT THE APPLICATION NO. FROM 13,883,290 TO 13,833,290 PREVIOUSLY RECORDED ON REEL 041703 FRAME 0536. ASSIGNOR(S) HEREBY CONFIRMS THE THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS.. Recorded Feb 20, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: SHENZHEN XINGUODU TECHNOLOGY CO., LTD.
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CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12681366 PREVIOUSLY RECORDED ON REEL 039361 FRAME 0212. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded May 9, 2017
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 042762/0145 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12681366 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded May 9, 2017
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 042985/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE PATENTS 8108266 AND 8062324 AND REPLACE THEM WITH 6108266 AND 8060324 PREVIOUSLY RECORDED ON REEL 037518 FRAME 0292. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Feb 1, 2017
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
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CORRECTIVE ASSIGNMENT TO CORRECT THE NATURE OF CONVEYANCE LISTED CHANGE OF NAME SHOULD BE MERGER AND CHANGE PREVIOUSLY RECORDED AT REEL: 040652 FRAME: 0180. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER AND CHANGE OF NAME. Recorded Jan 12, 2017
From: FREESCALE SEMICONDUCTOR INC.
To: NXP USA, INC.
Reel/Frame 041354/0148 →
CHANGE OF NAME Recorded Nov 8, 2016
From: FREESCALE SEMICONDUCTOR INC.
To: NXP USA, INC.
Reel/Frame 040652/0180 →
RELEASE OF SECURITY INTEREST Recorded Nov 7, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 040928/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 21, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V., F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 040925/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12092129 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Jul 14, 2016
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 039361/0212 →
SUPPLEMENT TO THE SECURITY AGREEMENT Recorded Jun 16, 2016
From: FREESCALE SEMICONDUCTOR, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 039138/0001 →
SECURITY AGREEMENT SUPPLEMENT Recorded Mar 7, 2016
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
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ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 13, 2016
From: CITIBANK, N.A.
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ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 12, 2016
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To: MORGAN STANLEY SENIOR FUNDING, INC.
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PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037356/0553 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
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PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037354/0670 →
SECURITY AGREEMENT Recorded Nov 6, 2013
From: FREESCALE SEMICONDUCTOR, INC.
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