IP Library Patent Application 11954835
Patent Application
App. No. 11/954,835

SEMICONDUCTOR DEVICE WITH IMPROVED SOURCE AND DRAIN AND METHOD OF MANUFACTURING THE SAME

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Quick Facts
Patent No.
US None
App. No.
11/954,835
Abstract

A semiconductor device includes a gate, extension layers, source drain layers, and silicide layers. The gate is formed on one of a n-type semiconductor substrate and a n-type through a gate insulation film. The extension layers are p-type semiconductors and formed under sidewalls which are formed on both sides of the gate. The source drain layers are p-type semiconductors and formed in contact with the outsides of the extension layers. The silicide layers are formed on surface regions of the source drain layers. The extension layers include inhibitor elements which inhibit p-type impurity diffusion in the extension layers. The silicide layers do not substantially include the inhibitor elements.

Claims (34)

1 . A semiconductor device comprising:

a gate configured to be formed on one of a n-type semiconductor substrate and a n-type through a gate insulation film;

extension layers configured to be p-type semiconductors and formed under sidewalls which are formed on both sides of said gate;

source drain layers configured to be p-type semiconductors and formed in contact with the outsides of said extension layers; and

silicide layers configured to be formed on surface regions of said source drain layers,

wherein said extension layers include inhibitor elements which inhibit p-type impurity diffusion in said extension layers, and

said silicide layers do not substantially include said inhibitor elements.

2 . The semiconductor device according to claim 1 , wherein said inhibitor elements includes carbon.

3 . The semiconductor device according to claim 1 , wherein said silicide layers includes at least one of nickel and platinum.

4 . The semiconductor device according to claim 1 , wherein said silicide layers includes germanium.

5 . The semiconductor device according to claim 1 , wherein said silicide layers includes p-type impurities.

6 . The semiconductor device according to claim 2 , wherein said silicide layers includes at least one of nickel and platinum.

7 . The semiconductor device according to claim 2 , wherein said silicide layers includes germanium.

8 . The semiconductor device according to claim 2 , wherein said silicide layers includes p-type impurities.

9 . The semiconductor device according to claim 6 , wherein said silicide layers includes germanium.

10 . The semiconductor device according to claim 6 , wherein said silicide layers includes p-type impurities.

11 . A method of manufacturing a semiconductor device, comprising:

forming extension layers by implanting ions containing inhibitor elements which inhibit p-type impurity diffusion and ions containing p-type impurities using a gate formed on one of a n-type semiconductor substrate and a n-type through a gate insulation film as a mask;

forming source drain layers by implanting ions containing p-type impurities into said extension layers deeper than said extension layers using sidewalls which are formed on both sides of said gate as a mask;

removing upper parts of said source drain layers using said gate and said sidewalls as a mask; and

forming silicide layers in regions where said upper parts are removed.

12 . The method of manufacturing a semiconductor device according to claim 11 , wherein said inhibitor elements includes carbon.

13 . The method of manufacturing a semiconductor device according to claim 11 , wherein said forming silicide layers step includes:

forming epitaxial layers in said regions where said upper parts are removed, and

forming said silicide layers by silicidation of said epitaxial layers.

14 . The method of manufacturing a semiconductor device according to claim 13 , wherein said epitaxial layers include germanium.

15 . The method of manufacturing a semiconductor device according to claim 13 , wherein said epitaxial layers include p-type impurities.

16 . The method of manufacturing a semiconductor device according to claim 11 , wherein said silicide layers include at least one of nickel and platinum.

17 . The method of manufacturing a semiconductor device according to claim 12 , wherein said forming silicide layers step includes:

forming epitaxial layers in said regions where said upper parts are removed, and

forming said silicide layers by silicidation of said epitaxial layers.

18 . The method of manufacturing a semiconductor device according to claim 17 , wherein said epitaxial layers include germanium.

19 . The method of manufacturing a semiconductor device according to claim 17 , wherein said epitaxial layers include p-type impurities.

20 . The method of manufacturing a semiconductor device according to claim 12 , wherein said silicide layers include at least one of nickel and platinum.

Assignments (2)
CHANGE OF NAME Recorded Nov 2, 2010
From: NEC ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 025235/0321 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 12, 2007
From: MINEJI, AKIRA
To: NEC ELECTRONICS CORPORATION
Reel/Frame 020235/0511 →