IP Library Granted Patent US 7,698,811
Granted Patent B2
US 7,698,811 · App. 11/959,212 · Granted Apr 20, 2010

Method for manufacturing multilayer printed circuit boards using inner substrate

Assignee: Foxconn Advanced Technology Inc.
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Quick Facts
Patent No.
US 7,698,811
App. No.
11/959,212
Granted
Apr 20, 2010
Kind
B2
Abstract

An exemplary inner substrate for manufacturing multilayer printed circuit boards is provided. The inner substrate has a number of substrate units and a number of transverse folding portions alternately arranged along a longitudinal direction of the inner substrate. Each of the substrate units is configured for forming a unitary printed circuit board. Each of the folding portions is interconnected between neighboring substrate units. Each of the folding portions defines at least one line weakness perpendicular to the longitudinal direction of the inner substrate for facilitating folding and unfolding the neighboring substrate units to each other. An exemplary method for manufacturing multilayer printed circuit boards using the inner substrate is also provided. The method can improve efficiency of manufacturing multilayer printed circuit boards.

Claims (23)

1. A method for manufacturing multilayer printed circuit boards, comprising the steps of:

providing an elongated inner substrate comprising a plurality of substrate units and a plurality of transverse folding portions alternately arranged along a longitudinal direction thereof, each of the folding portions being interconnected between two neighboring substrate units, each of the folding portions defining at least one line weakness perpendicular to the longitudinal direction of the inner substrate; and

laminating at least one circuit substrate on each of the substrate units;

folding the inner substrate in a manner such that at least two of the substrate units are stacked one on another;

unfolding the stacked substrate units as needed to perform processing of the at least one circuit substrate on each of the unfolded substrate units; and

processing the at least one circuit substrate on each of the unfolded substrate units.

2. The method as claimed in claim 1 , wherein processing the at least one circuit substrate comprises at least one step selected from the group of steps consisting of drilling holes in the at least one circuit substrate, forming electrical traces on the at least one circuit substrate, electroplating gold on terminals of the electrical traces, laminating protective films on the at least one circuit substrate, and inspecting electrical connection and external appearance.

3. The method as claimed in claim 1 , wherein a separating film is interposed between the two neighboring stacked substrate units.

4. The method as claimed in claim 1 , wherein the at least one line weakness includes a first line and a second line, each of the folding portions comprising a plurality of first through-holes aligned in the first line and a plurality of second through-holes aligned in the second line parallel to the first line.

5. The method as claimed in claim 4 , wherein a distance between a first line and the second line is either equal to or more than a total thickness of the inner substrate and the at least one circuit substrate sandwiched between two neighboring stacked substrate units of the inner substrate.

6. The method as claimed in claim 1 , wherein each of the folding portions defines a groove in at least one side thereof along the at least one line weakness.

7. The method as claimed in claim 6 , wherein a width of the groove is either equal to or more than a total thickness of the inner substrate and the at least one circuit substrate sandwiched between two neighboring stacked substrate units of the inner substrate.

8. The method as claimed in claim 1 , wherein the at least one line weakness includes a first line and a second line, each of the folding portions comprising a first groove in at least one side thereof along in the first line and a second groove in at least one side thereof along the second line parallel to the first line.

9. The method as claimed in claim 8 , wherein a distance between a first line and the second line is either equal to or more than a total thickness of the inner substrate and the at least one circuit substrate sandwiched between two neighboring stacked substrate units of the inner substrate.

10. The method as claimed in claim 2 , wherein prior to electroplating gold on terminals of the electrical traces, at least one conductive adhesive tape is attached on the inner substrate to electrically connect two neighboring substrate units.

11. The method as claimed in claim 10 , wherein the conductive adhesive tape is attached onto the inner substrate using a process selected from a group consisting of a thermal attachment process and an ultrasonic attachment process.

12. The method as claimed in claim 2 , wherein the at least one line weakness includes a first line and a second line, each of the folding portions comprising a plurality of first through-holes aligned in the first line and a plurality of second through-holes aligned in the second line parallel to the first line.

13. The method as claimed in claim 12 , wherein a distance between the first line and the second line is equal to or larger than a total thickness of the two neighboring substrate units of the inner substrate and the corresponding at least one circuit substrate or at least one circuit substrates which is or are sandwiched between the two neighboring substrate units when the two neighboring substrate units are stacked one on another.

14. The method as claimed in claim 2 , wherein each of the folding portions defines a groove in at least one side thereof along the at least one line weakness.

15. The method as claimed in claim 14 , wherein a width of the groove is equal to or larger than a total thickness of the two neighboring substrate units of the inner substrate and the corresponding at least one circuit substrate or at least one circuit substrates which is or are sandwiched between the two neighboring substrate units when the two neighboring substrate units are stacked one on another.

16. The method as claimed in claim 2 , wherein the at least one line weakness includes a first line and a second line parallel to the first line, each of the folding portions comprising a first groove in at least one side thereof along the first line and a second groove in at least one side thereof along the second line.

17. The method as claimed in claim 16 , wherein a distance between the first line and the second line is equal to or larger than a total thickness of the two neighboring substrate units of the inner substrate and the corresponding at least one circuit substrate or at least one circuit substrates which is or are sandwiched between the two neighboring substrate units when the two neighboring substrate units are stacked one on another.

18. The method as claimed in claim 2 , wherein a separating film is interposed between each two neighboring stacked substrate units.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 17, 2017
From: ZHEN DING TECHNOLOGY CO., LTD.
To: GARUDA TECHNOLOGY CO., LTD
Reel/Frame 040978/0953 →
CHANGE OF NAME Recorded Sep 13, 2011
From: FOXCONN ADVANCED TECHNOLOGY INC.
To: ZHEN DING TECHNOLOGY CO., LTD.
Reel/Frame 026893/0985 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 18, 2007
From: YANG, CHIH-KANG; LIN, CHENG-HSIEN
To: FOXCONN ADVANCED TECHNOLOGY INC.
Reel/Frame 020265/0068 →
Priority Claims (1)
CN 2007 1 0076017 · Jul 13, 2007 · national
Continuity (1)
Related Publication 20090013526A1 · Jan 15, 2009