IP Library Granted Patent US 7,782,071
Granted Patent B2
US 7,782,071 · App. 11/960,597 · Granted Aug 24, 2010

Probe card analysis system and method

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Quick Facts
Patent No.
US 7,782,071
App. No.
11/960,597
Granted
Aug 24, 2010
Kind
B2
Abstract

A system and method for evaluating wafer test probe cards under real-world wafer test cell condition integrates wafer test cell components into the probe card inspection and analysis process. Disclosed embodiments may utilize existing and/or modified wafer test cell components such as, a head plate, a test head, a signal delivery system, and a manipulator to emulate wafer test cell dynamics during the probe card inspection and analysis process.

Claims (20)

1. A wafer test station comprising:

a test head having a probe card mounted therein, the probe card having a plurality of probes for forming an electrical connection with at least one device under test when the probes are placed in physical contact with the at least one device under test;

a prober module having a stage for supporting the at least one device under test and for moving the at least one device under test into and out of contact with the probes of the probe card;

a probe array analyzer module having an optical inspection system adapted to image each of the plurality of probes of the probe card, the optical inspection system comprising:

a transparent fiducial plate, the fiducial plate have a plurality of fiducials formed therein in known positions;

a viewing system positioned to capture an image of at least one of the plurality of probes through the fiducial plate;

a processor for identifying a position of substantially all of the probes of the probe card relative to the fiducials and to one another;

wherein the test head, the prober module and the probe array analyzer module include mechanisms associated therewith that permit the test head to be is configured to be selectively coupled to either of the prober module and the probe array analyzer module such that the probe card is loaded in substantially the same manner when the test head is coupled to the prober module or the probe array analyzer module.

2. The wafer test station of claim 1 wherein the probe array analyzer module further comprises:

an electrical test mechanism for creating a closed test circuit between at least one of the plurality of probes and a probe card tester.

3. The wafer test station of claim 2 wherein the electrical test mechanism is configured to determine at least one of the following concerning at least one probe of a probe card:

an electrical connectivity of the at least one probe;

leakage of the at least one probe;

capacitance of the at least one probe; and

contact resistance of the at least one probe.

4. The wafer test station of claim 2 wherein the electrical test mechanism comprises a conductive coating on the fiducial plate such that the closed test circuit between the at least one of the plurality of probes and the probe testing system is formed when the at least one probe is in contact with the fiducial plate.

5. The wafer test station of claim 1 wherein the optical inspection system is configured to determine at least one of the following concerning at least one probe of the probe card:

an XYZ position of the at least one probe when the at least one probe is in a unloaded state;

an XYZ position of the at least one probe when the at least one probe is in a loaded state; and

presence of the at least one probe.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 2, 2020
From: RUDOLPH TECHNOLOGIES, INC.
To: ONTO INNOVATION INC.
Reel/Frame 053117/0623 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 7, 2008
From: APPLIED PRECISION, LLC
To: RUDOLPH TECHNOLOGIES, INC.
Reel/Frame 020915/0240 →