IP Library Granted Patent US 7,919,795
Granted Patent B2
US 7,919,795 · App. 11/961,149 · Granted Apr 5, 2011

Wire structure, method for fabricating wire, thin film transistor substrate, and method for fabricating the thin film transistor substrate

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Quick Facts
Patent No.
US 7,919,795
App. No.
11/961,149
Granted
Apr 5, 2011
Kind
B2
Abstract

Provided are a wire structure, a method for fabricating a wire, a thin film transistor (TFT) substrate and a method for fabricating a TFT substrate. The wire structure includes a barrier layer formed on a substrate and including copper, copper solid solution layer.

Claims (43)

1. A thin film transistor substrate comprising:

an insulating substrate;

a metal layer on the insulating substrate, the metal layer comprising a copper layer and a copper solid solution layer, the copper solid solution layer comprising copper and Oxygen; and

an insulating layer on the substrate and covering the metal layer.

2. The thin film transistor substrate of claim 1 , wherein the copper solid solution layer comprises a first copper solid solution layer formed under the copper layer and a second copper solid solution layer formed on top of the copper layer.

3. The thin film transistor substrate of claim 1 , wherein the copper solid solution layer is formed on the copper layer.

4. The thin film transistor substrate of claim 1 , wherein the copper solid solution layer is formed on the insulating substrate and the copper layer is formed on the copper solid solution layer.

5. The thin film transistor substrate of claim 4 , wherein the metal layer is a gate line connected to the gate electrode of the thin film transistor.

6. The thin film transistor substrate of claim 4 , further comprising semiconductor pattern and a second metal layer, the second metal layer comprising data line, source electrode and drain electrode.

7. The thin film transistor substrate of claim 6 , wherein the second metal layer comprises a copper layer and a copper solid solution layer, the copper solid solution layer comprising copper and oxygen.

8. The thin film transistor substrate of claim 7 , wherein the copper solid solution layer of the second metal layer comprises a third copper solid solution layer formed under the copper layer and a fourth copper solid solution layer formed on top of the copper layer.

9. The thin film transistor substrate of claim 1 , wherein the insulating layer comprises silicon and at least one of the oxygen or nitrogen.

10. The thin film transistor substrate of claim 9 , wherein the insulating layer further comprising Silicon nitride (SiNy) formed on the insulating layer.

11. The thin film transistor substrate of claim 6 , further comprising a color filter layer, the color filter layer formed on the second metal layer comprising red, green, blue color filters.

12. The thin film transistor substrate of claim 1 , further comprising a color filter layer formed on the insulating substrate and the metal layer.

13. The thin film transistor substrate of claim 12 , further comprising a black matrix, wherein the black matrix is formed on the substrate such that at least a portion of the color filter layer covers the black matrix.

14. A method of manufacturing a thin film transistor array panel on an insulating substrate, the method comprising:

forming a metal layer on the insulating substrate, the metal layer comprising a copper layer and a copper solid solution layer, the copper solid solution layer comprising copper and Oxygen; and

forming an insulating layer on the insulating substrate and covering the metal layer.

15. The method of claim 14 , wherein the copper solid solution layer is formed on the insulating substrate and the copper layer is formed on the copper solid solution layer.

16. The method of claim 14 , wherein the insulating layer comprises silicon and at least one of oxygen and nitrogen.

17. The method of claim 16 , wherein the insulating layer further comprises silicon nitride (SiNy).

18. The method of claim 14 , further comprising forming a semi-conductor pattern and a second metal layer, the second metal layer comprising a data line, a source electrode and a drain electrode.

19. The method of claim 18 , wherein the second metal layer comprises a copper layer and a copper solid solution layer, the copper solid solution layer comprising copper and oxygen.

20. The method of claim 18 , further comprising forming a color filter layer, wherein the color filter layer formed on the second metal layer comprises red, green, blue color filters.

21. The method of claim 14 , further comprising forming a color filter layer, wherein the color filter layer is formed on the insulating substrate before forming the metal layer.

22. The method of claim 21 , further comprising forming a black matrix layer, wherein the black matrix layer is formed on the insulating substrate before forming color filter layer.

23. A thin film transistor substrate comprising:

an insulating substrate;

a metal layer on the insulating substrate, the metal layer comprising a copper layer and a copper solid solution layer, the copper solid solution layer comprising copper, Oxygen and Nitrogen; and

an insulating layer on the substrate and covering the metal layer.

24. The thin film transistor substrate of claim 23 , wherein the copper solid solution layer comprises a first copper solid solution layer formed under the copper layer and a second copper solid solution layer formed on top of the copper layer.

25. The thin film transistor of claim 23 , wherein the copper solid solution layer is formed on the copper layer.

26. The thin film transistor of claim 23 , wherein the copper solid solution layer is formed on the insulating substrate and the copper layer is formed on the copper solid solution layer.

27. The thin film transistor of claim 26 , wherein the metal layer is a gate line connected to the gate electrode of the thin film transistor.

28. The thin film transistor of claim 26 , further comprising semiconductor pattern and a second metal layer, the second metal layer comprising data line, source electrode and drain electrode.

29. The thin film transistor of claim 28 , wherein the second metal layer comprises a copper layer and a copper solid solution layer, the copper solid solution layer comprising copper, oxygen and nitrogen.

30. The thin film transistor of claim 29 , wherein the copper solid solution layer of the second metal layer comprises a third copper solid solution layer formed under the copper layer and a fourth copper solid solution layer formed on top of the copper layer.

31. The thin film transistor of claim 23 , wherein the insulating layer comprises silicon and at least one of the oxygen or nitrogen.

32. The thin film transistor of claim 31 , wherein the insulating layer further comprising Silicon nitride (SiNy) formed on the insulating layer.

33. The thin film transistor of claim 28 , further comprising a color filter layer, the color filter layer formed on the second metal layer comprising red, green, blue color filters.

34. The thin film transistor of claim 23 , further comprising a color filter layer, wherein the color filter is formed on the substrate before forming the metal layer.

35. The thin film transistor of claim 34 , further comprising a black matrix, wherein the black matrix is formed on the substrate before forming the color filter layer.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 22, 2012
From: SAMSUNG ELECTRONICS CO., LTD.
To: SAMSUNG DISPLAY CO., LTD.
Reel/Frame 029008/0028 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 20, 2007
From: LEE, JE-HUN; JEONG, CHANG-OH; LEE, EUN-GUK; KIM, DO-HYUN
To: SAMSUNG ELECTRONICS CO., LTD.
Reel/Frame 020276/0763 →