IP Library Granted Patent US 7,799,696
Granted Patent B2
US 7,799,696 · App. 11/961,828 · Granted Sep 21, 2010

Method of manufacturing an integrated circuit

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Quick Facts
Patent No.
US 7,799,696
App. No.
11/961,828
Granted
Sep 21, 2010
Kind
B2
Abstract

A method of manufacturing an integrated circuit including a memory device that includes the following processes: forming a mask layer structure above a composite structure including a resistivity changing layer and an electrode layer disposed above the resistivity changing layer; partially patterning the mask layer structure using a first substance; stopping patterning the mask layer structure before exposing the top surface of the electrode layer; at least partially exposing the top surface of the electrode layer using a second substance, the second substance chemically not reacting with the electrode layer material.

Claims (37)

1. A method of manufacturing an integrated circuit the method comprising:

forming a mask layer structure above a composite structure, the composite structure comprising a resistivity changing layer and an electrode layer disposed above the resistivity changing layer, the electrode layer having a top surface;

partially patterning the mask layer structure using a first substance;

stopping patterning the mask layer structure before exposing the top surface of the electrode layer; and

at least partially exposing the top surface of the electrode layer using a second substance, the second substance not reacting chemically with an electrode layer material such that clusters of electrode material and second substance are formed.

2. The method according to claim 1 , wherein the first substance comprises a plasma gas.

3. The method according to claim 2 , wherein the first substance comprises a noble plasma gas.

4. The method according to claim 3 , wherein the first substance comprises a fluorine plasma gas.

5. The method according to claim 1 , wherein the second substance comprises a plasma gas.

6. The method according to claim 5 , wherein the second substance comprises a noble plasma gas.

7. The method according to claim 6 , wherein the second substance comprises an argon plasma gas.

8. The method according to claim 1 , wherein the electrode layer comprises metal.

9. The method according to claim 8 , wherein the electrode layer comprises silver.

10. The method according to claim 1 , wherein the resistivity changing layer comprises chalcogenide.

11. The method according to claim 10 , wherein the resistivity changing layer comprises germanium sulphide.

12. The method according to claim 1 , wherein the mask layer structure comprises at least two layers.

13. The method according to claim 12 , wherein the mask layer structure comprises a metal layer and a dielectric layer disposed above the metal layer.

14. The method according to claim 13 , wherein the metal layer comprises titanium nitride or tantalum nitride.

15. The method according to claim 13 , wherein after stopping the patterning of the mask layer structure a remaining portion of the mask layer structure has a thickness of at least 40 percent of an original thickness of the metal layer.

16. The method according to claim 13 , wherein after stopping the patterning of the mask layer structure, a remaining portion of the mask layer structure has a thickness of at least 10 nm.

17. The method according to claim 1 , further comprising patterning the resistivity changing layer using the patterned mask layer structure and the second substance.

18. The method according to claim 17 , wherein the second substance does not significantly chemically react with a resistivity changing layer material.

19. The method according to claim 1 , wherein no chemical substance is formed when the second substance comes into contact with the electrode layer material.

20. A method of patterning a composite structure, the method comprising:

forming a mask layer structure on a composite structure, the composite structure comprising a resistivity changing layer and an electrode layer disposed above the resistivity changing layer;

forming a mask layer over the mask layer structure;

patterning the mask layer using a light exposure process;

patterning the mask layer structure using the patterned mask layer; and

patterning the composite structure using the patterned mask layer structure;

wherein patterning of the mask layer structure comprises:

partially patterning the mask layer structure using a first substance;

stopping patterning the mask layer structure before exposing a top surface of the electrode layer; and

at least partially exposing the top surface of the electrode layer using a second substance, the second substance not reacting chemically with an electrode layer material in a way that clusters of electrode material and second substance are formed.

21. The method according to claim 20 , wherein the first substance comprises a fluorine plasma gas.

22. The method according to claim 20 , wherein the second substance comprises a noble plasma gas.

23. The method according to claim 22 , wherein the second substance comprises an argon plasma gas.

24. The method according to claim 20 , wherein the electrode layer comprises silver.

Assignments (3)
CONFIRMATORY PATENT ASSIGNMENT Recorded Mar 24, 2016
From: INFINEON TECHNOLOGIES AG
To: SAMSUNG ELECTRONICS CO., LTD.
Reel/Frame 038238/0955 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 8, 2015
From: QIMONDA AG
To: INFINEON TECHNOLOGIES AG
Reel/Frame 035623/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 11, 2008
From: CHOLET, STEPHANE
To: QIMONDA AG; ALTIS SEMICONDUCTOR, SNC
Reel/Frame 020629/0157 →