IP Library Granted Patent US 7,821,058
Granted Patent B2
US 7,821,058 · App. 11/970,992 · Granted Oct 26, 2010

Nonvolatile semiconductor memory and method for manufacturing the same

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Quick Facts
Patent No.
US 7,821,058
App. No.
11/970,992
Granted
Oct 26, 2010
Kind
B2
Abstract

According to an aspect of the present invention, there is provided a nonvolatile semiconductor memory including: a columnar semiconductor; a charge storage insulating film including: a first insulating film formed around the columnar semiconductor, a charge storage film formed around the first insulating film, and a second insulating film formed around the charge storage film; an electrode extending two-dimensionally to surround the charge storage insulating film, the electrode having a groove; and a metal silicide formed on a sidewall of the groove.

Claims (33)

1. A nonvolatile semiconductor memory comprising:

a semiconductor substrate;

a plurality of columnar semiconductors formed on the semiconductor substrate to vertically extend in parallel with one another and to be in a matrix as viewed from above;

plurality of charge storage insulating films formed around the columnar semiconductors, respectively:

at least two of plate-like electrodes each extending two-dimensionally to be perpendicular to the columnar semiconductors and to surround the charge storage insulating films, each electrode respectively forming a memory transistor with the columnar semiconductors and the charge storage insulating films, at least one groove vertically passing through the electrodes to expose sidewalls of the electrodes; and

a plurality of metal silicides formed on the exposed sidewalls of the electrodes, respectively.

2. The nonvolatile semiconductor memory according to claim 1 , wherein the columnar semiconductor, the charge storage insulating film and the electrode form a memory transistor operated in a depression mode.

3. The nonvolatile semiconductor memory according to claim 1 , wherein the columnar semiconductor comprises a plurality of columnar semiconductors;

wherein the charge storage insulating film comprises a plurality of charge storage insulating films respectively formed around the plurality of columnar semiconductors;

wherein the electrode is formed to surround the plurality of charge storage insulating films;

wherein the groove comprises a plurality of grooves; and

wherein the metal silicide is formed on respective sidewalls of the plurality of grooves.

4. The nonvolatile semiconductor memory according to claim 3 , wherein the electrode comprises a plurality of linear portions separated from each other by the plurality of grooves.

5. The nonvolatile semiconductor memory according to claim 4 , wherein the plurality of linear portions are connected with each other on one end of the electrode.

6. The nonvolatile semiconductor memory according to claim 4 , wherein the plurality of linear portions are connected with each other on both ends of the electrode.

7. The nonvolatile semiconductor memory according to claim 3 , wherein the plurality of columnar semiconductors are formed in parallel; and

wherein the plurality of columnar semiconductors are disposed in a matrix.

8. The nonvolatile semiconductor memory according to claim 1 , wherein the electrode comprises a plurality of electrodes alternately laminated with a plurality of insulators; and

wherein each of the plurality of electrodes surrounds the charge storage insulating film.

9. The nonvolatile semiconductor memory according to claim 8 , wherein the columnar semiconductor, the plurality of electrodes and the charge storage insulating film form a memory string having a plurality of memory transistors operated in a depression mode.

10. The nonvolatile semiconductor memory according to claim 1 further comprising:

a gate insulating film formed around the columnar semiconductor above the charge storage insulating film;

a second electrode surrounds the gate insulating film; and

a second metal silicide formed on a sidewall of the second electrode.

11. The nonvolatile semiconductor memory according to claim 10 , wherein the columnar semiconductor, the gate insulating film and the second electrode form a selection transistor operated in a depression mode.

12. The nonvolatile semiconductor memory according to claim 1 , wherein the metal silicide comprises at least one of a titanium silicide, a cobalt silicide and a nickel silicide.

13. The nonvolatile semiconductor memory according to claim 1 further comprising:

a plurality of gate insulating films formed around the columnar semiconductors above the charge storage insulating films, respectively;

a gate electrode extending two-dimensionally to be perpendicular to the columnar semiconductors and to surround the gate insulating films, the gate electrode respectively forming a select transistor with the columnar semiconductors and the gate insulating films, at least one groove vertically passing through the gate electrode to expose a sidewall of the gate electrode; and

a second metal silicide formed on the exposed sidewall of the gate electrode.

14. The nonvolatile semiconductor memory according to claim 13 , wherein the second metal silicide comprises at least one of a titanium silicide, a cobalt silicide and a nickel silicide.

15. The nonvolatile semiconductor memory according to claim 13 , wherein a plurality of grooves are formed in each electrode; and

wherein a first metal silicide is formed on sidewalls of the plurality of grooves.

Assignments (4)
CHANGE OF NAME AND ADDRESS Recorded Jul 29, 2021
From: K.K PANGEA
To: TOSHIBA MEMORY CORPORATION
Reel/Frame 057016/0551 →
MERGER Recorded Jul 29, 2021
From: TOSHIBA MEMORY CORPORATION
To: K.K PANGEA
Reel/Frame 057016/0586 →
CHANGE OF NAME AND ADDRESS Recorded Jul 29, 2021
From: TOSHIBA MEMORY CORPORATION
To: KIOXIA CORPORATION
Reel/Frame 057016/0611 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 24, 2017
From: KABUSHIKI KAISHA TOSHIBA
To: TOSHIBA MEMORY CORPORATION
Reel/Frame 043709/0035 →