Method for Controlled Formation of a Gate Dielectric Stack
The present disclosure relates to methods for forming a gate stack in a MOSFET device and to MOSFET devices obtainable through such methods. In exemplary methods described herein, a rare-earth-containing layer is deposited on a layer of a silicon-containing dielectric material. Before these layers are annealed, a gate electrode material is deposited on the rare-earth-containing layer. Annealing is performed after the deposition of the gate electrode material, such that a rare earth silicate layer is formed.
1 . A method for forming a gate stack in a MOSFET device, comprising:
forming, on a semiconductor substrate, a dielectric comprising at least one layer, the dielectric having an upper layer comprising a Si-containing dielectric material;
depositing at least one rare earth oxide layer on the upper layer of the dielectric;
depositing a metal gate electrode material on the rare earth oxide layer; and
only after depositing the metal gate electrode material, annealing the gate stack to form a rare earth silicate layer.
2 . A method according to claim 1 , wherein the thickness of the rare earth oxide layer is REO, the thickness of the upper layer of the dielectric is Si(CDM), and the ratio REO:( REO+Si(CDM)) is between about 0.1 and about 0.4.
3 . A method according to claim 1 , wherein the thickness of the rare earth oxide layer is REO, the thickness of the upper layer of the dielectric is Si(CDM), and the ratio REO:( REO+Si(CDM)) is between about 0.2 and about 0.3.
4 . A method according to claim 1 , wherein the rare earth oxide layer is formed using a deposition technique selected from the group consisting of MOCVD, ALD, AVD and PVD.
5 . A method according to claim 1 , wherein the rare earth oxide layer comprises one or more rare earth elements selected from the group consisting of La, Y, Pr, Nd, Sm, Eu, Gd, Dy, Er, and Yb.
6 . A method according to claim 5 , wherein the rare earth oxide layer comprises one or more rare earth oxides selected from the group consisting of La-based oxides and Dy-based oxides.
7 . A method according to claim 1 , wherein the rare earth oxide layer comprises dysprosium oxide.
8 . A method according to claim 1 , wherein the rare earth oxide layer comprises dysprosium scandate.
9 . A method according to claim 1 , wherein the rare earth oxide layer further comprises a modulator element selected from the group consisting of Sc, Hf and Al.
10 . A method for forming a gate stack in a MOSFET device comprising:
forming, on a semiconductor substrate, a dielectric comprising at least one layer, the dielectric having an upper layer comprising a Si-containing dielectric material;
depositing at least one rare earth layer on the upper layer of the dielectric;
depositing a metal gate electrode material on the rare earth layer;
preventing oxidation of the rare earth layer; and
only after depositing the metal gate electrode material, annealing the gate stack to form a rare earth silicate layer.
11 . A method according to claim 1 , wherein the upper layer of the dielectric comprises a high-k material.
12 . A method according to claim 1 , wherein the upper layer of the dielectric comprises SiO 2 .
13 . A method according to claim 1 , wherein the upper layer of the dielectric consists of SiO 2 .
14 . A method according to claim 1 , wherein the upper layer of the dielectric comprises nitrogen.
15 . A method according to claim 14 , wherein the upper layer of the dielectric consists of SiON.
16 . A method according to claim 1 , wherein the annealing step is performed at a temperature between about 600° C. and about 1200° C.
17 . A method according to claim 1 , wherein the annealing step is performed at a temperature between about 800° C. and about 1200° C.
18 . A method according to claim 1 , wherein the upper layer of the dielectric is formed using a deposition technique selected from the group consisting of MOCVD, ALD, AVD and PVD.
19 . A method according to claim 1 , wherein the metal gate electrode material comprises a material selected from the group consisting of W, Ta, TI, Ru, Pt and Mo.
20 . A method according to claim 1 , wherein the substrate comprises a semiconductor selected from the group consisting of Ge, SiGe, GaAs, and InP.
21 . A method according to claim 1 , wherein the annealing step is a post-deposition anneal.
22 . A method according to claim 1 , wherein the annealing step is a Rapid Thermal Anneal.
23 . A method according to claim 1 , wherein the annealing step is performed at a temperature between about 800° C. and about 1000° C.
24 . A MOSFET device having a gate stack comprising:
a semiconductor substrate,
a dielectric on the substrate, the dielectric comprising at least one layer of a Si-containing dielectric material;
a rare earth silicate layer on the layer of Si-containing dielectric material; and
a metal gate electrode on the rare earth silicate layer;
wherein the gate stack is formed by a method comprising:
depositing a rare-earth-containing layer on the layer of Si-containing dielectric material, wherein the rare-earth-containing layer is selected from the group consisting of a rare earth layer and a rare earth oxide layer;
depositing the metal gate electrode on the rare-earth containing layer; and
only after depositing the metal gate electrode, annealing the gate stack to form the rare earth silicate layer.
25 . A MOSFET device according to claim 24 , further comprising an unreacted rare-earth-containing layer.
26 . A MOSFET device according to claim 24 , further comprising a polySi layer on the metal gate electrode.
27 . A MOSFET device according to claim 24 , wherein the Si-containing dielectric material is selected from the group consisting of SiO 2 , SiON, HfSiO, and HfSiON.
28 . A MOSFET device according to claim 24 , wherein the rare-earth-containing layer comprises one or more rare earth elements selected from the group consisting of La, Y, Pr, Nd, Sm, Eu, Gd, Dy, Er, and Yb.
29 . A MOSFET device according to claim 24 , wherein the rare-earth-containing layer comprises one or more rare earth oxides selected from the group consisting of oxides of La, Y, Pr, Nd, Sm, Eu, Gd, Dy, Er, and Yb.
30 . A MOSFET device according to claim 24 , wherein the rare-earth-containing layer comprises a rare earth oxide selected from the group consisting of La-based oxides and Dy-based oxides.
31 . A MOSFET device according to claim 24 , wherein the rare-earth-containing layer comprises dysprosium oxide or dysprosium scandate.
32 . A MOSFET device according to claim 24 , wherein the metal gate electrode comprises one or more materials selected from the group consisting of W, Ti, Ta, Pt, Ru and Mo.
33 . A MOSFET device according to claim 24 , wherein the substrate comprises a layer of a semiconductor selected from the group consisting of Ge, SiGe, GaAs, and InP.
34 . A method for forming a capacitor comprising:
providing a first electrode material;
forming on the first electrode material a dielectric comprising at least one layer, the dielectric having an upper layer comprising a Si-containing dielectric material
depositing a rare-earth-containing layer on the layer of Si-containing dielectric material, wherein the rare-earth-containing layer is selected from the group consisting of a rare earth layer and a rare earth oxide layer
depositing a second electrode material on the rare-earth-containing layer; and
only after the second electrode material is deposited, annealing the capacitor to form a rare earth silicate.
35 . A capacitor comprising:
a first electrode;
a dielectric on the first electrode, the dielectric comprising at least one layer of a Si-containing dielectric material;
a rare earth silicate layer on the layer of Si-containing dielectric material; and
a second electrode on the first electrode;
wherein the capacitor is formed by a method comprising:
depositing a rare-earth-containing layer on the layer of Si-containing dielectric material, wherein the rare-earth-containing layer is selected from the group consisting of a rare earth layer and a rare earth oxide layer;
depositing second electrode on the rare-earth containing layer; and
only after depositing the second electrode, annealing the capacitor to form the rare earth silicate layer.
36 . A method according to claim 10 , wherein preventing oxidation is performed by maintaining a vacuum at least between the steps of depositing the rare earth layer and depositing the metal gate electrode material.