IP Library Granted Patent US 8,269,319
Granted Patent B2
US 8,269,319 · App. 11/973,869 · Granted Sep 18, 2012

Collective and synergistic MRAM shields

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Quick Facts
Patent No.
US 8,269,319
App. No.
11/973,869
Granted
Sep 18, 2012
Kind
B2
Abstract

Various structures chip packages are disclosed including a magnetoresistive random access memory (“MRAM”) device and a magnetic shield structure. The magnetic shield structure may be made from material having either ferromagnetic or diamagnetic material and may be shaped and incorporated into the chip package to divert stray magnetic fields away from the MRAM device.

Claims (41)

1. A microelectronic component, comprising:

a first die having top and bottom surfaces and edges extending between the top and bottom surfaces defining an outer periphery, the die including MRAM circuitry;

a first magnetic shield overlying the top surface of the first die, the first magnetic shield having a top surface facing away from the die;

a second magnetic shield overlying the bottom surface;

a second die having top and bottom surfaces and including MRAM circuitry; the second die overlying the top surface of the first magnetic shield; and

a third magnetic shield overlying the top surface of the second die,

wherein at least one of the first and second magnetic shields includes a ferromagnetic material.

2. The microelectronic component as claimed in claim 1 wherein the first and second magnetic shields extend beyond the outer periphery of the first die.

3. The microelectronic component as claimed in claim 1 , wherein at least one of the first and second magnetic shields has edges disposed beyond each of the edges of the first die.

4. The microelectronic component as claimed in claim 1 , the microelectronic component further comprising a third die including MRAM circuitry overlying the top surface of the third magnetic shield, the third die having top and bottom surfaces and edges extending between the top and bottom surfaces defining an outer periphery, and a fourth magnetic shield overlying the third die and the top surface of the third magnetic shield, wherein the fourth magnetic shield extends beyond the outer periphery of the third die.

5. The microelectronic component as claimed in claim 1 , wherein the first and second magnetic shields extend beyond an outer periphery of the MRAM circuitry.

6. The microelectronic component as claimed in claim 1 , wherein the MRAM circuitry has edges defining the outer periphery of the MRAM circuitry and at least one of the first and second magnetic shields has edges disposed beyond each of the edges of the MRAM circuitry.

7. The microelectronic component as claimed in claim 1 , wherein the ferromagnetic material includes at least one metal selected from the group consisting of iron, nickel and cobalt.

8. The microelectronic component as claimed in claim 1 , wherein the ferromagnetic material has a magnetic reluctance that is less than a magnetic reluctance of the die.

9. The microelectronic component as claimed in claim 1 , wherein at least one of the first and second magnetic shields includes a diamagnetic material.

10. The microelectronic component as claimed in claim 9 , the diamagnetic material selected from the group consisting of bismuth and pyrolitic graphite.

11. The microelectronic component as claimed in claim 1 , wherein at least one of the first and second magnetic shields includes a polymeric material applied to a portion of the microelectronic component, the polymeric material containing a plurality of ferromagnetic particles interspersed therein.

12. The microelectronic component as claimed in claim 1 , wherein the first magnetic shield defines a first major wall of a magnetic shielding enclosure, the second magnetic shield defines a second major wall of the magnetic shielding enclosure, the magnetic shielding enclosure further comprising a plurality of minor walls extending between the first and second major walls so as to define an aperture, wherein the die is disposed within the aperture.

13. The microelectronic component as claimed in claim 1 further including a substrate having a first face mounted to the top surface of the first die, wherein the first magnetic shield overlies the substrate.

14. The microelectronic element of claim 13 , wherein the second magnetic shield has a first length that differs from a second length of the first magnetic shield.

15. The microelectronic assembly of claim 14 , wherein the second length is smaller than the first length.

16. The microelectronic component as claimed in claim 1 , wherein at least one of the first and second magnetic shields is mounted to at least one of the first and second die.

17. The microelectronic component as claimed in claim 1 , wherein the bottom surface of the second die is disposed adjacent to the first magnetic shield such that the first magnetic shield is the only magnetic shield disposed between the top surface of the first die and the bottom surface of the second die.

18. The microelectronic component as claimed in claim 1 , wherein the first die is mounted to a first surface of a substrate having a hole such that the MRAM circuitry electrically of the first die is connected through the hole to a conductive element on a second surface of the substrate.

19. The microelectronic component as claimed in claim 18 , wherein a plurality of wires electrically connect the MRAM circuitry with a plurality of the conductive elements on the substrate.

20. The microelectronic component as claimed in claim 18 , wherein the hole is located substantially in the center of the substrate.

21. The microelectronic element of claim 1 , wherein the second magnetic shield has a first length that differs from a second length of the first magnetic shield.

22. A microelectronic component, comprising:

a die having top and bottom surfaces and edge surfaces extending between the top and bottom surfaces defining an outer periphery, the die including MRAM circuitry;

a first magnetic shield overlying the top surface,

a second magnetic shield overlying the bottom surface;

wherein at least one of the edge surfaces is canted at a non-right angle away from the bottom surface, wherein the second magnetic shield extends along the bottom surface and onto the at least one edge surface.

23. The microelectronic component as claimed in claim 22 , wherein the second magnetic shield is formed by at least one of sputtering, electroplating, electroless-plating, chemical vapor disposition, or evaporation.

24. A microelectronic assembly, comprising:

a plurality of microelectronic subassemblies, each including:

a die having a first face, a second face remote from the first face and MRAM circuitry embedded therein;

a magnetic shield including a ferromagnetic material mounted to the first face of the die adapted to divert a stray magnetic field away from the MRAM circuitry;

a plurality of conductive support elements supporting the plurality of microelectronic subassemblies in stacked relation to each other so that the dies overlie one another.

25. The microelectronic assembly as claimed in claim 24 , further comprising a second magnetic shield mounted to one of the dies at an open end of the stacked microelectronic subassemblies.

26. The microelectronic assembly as claimed in claim 24 , wherein the support elements include at least one of solder balls, conductive pins, or conductive posts.

27. The microelectronic assembly as claimed in claim 26 , wherein the support elements include solder balls and the solder balls have a diameter at least as large as a thickness of the die and a thickness of the magnetic shield combined.

Assignments (7)
CHANGE OF NAME Recorded Nov 21, 2025
From: TESSERA LLC
To: ADEIA SEMICONDUCTOR SOLUTIONS LLC
Reel/Frame 073658/0661 →
CHANGE OF NAME Recorded Nov 21, 2025
From: TESSERA, INC.
To: TESSERA LLC
Reel/Frame 073657/0979 →
RELEASE OF SECURITY INTEREST Recorded Jun 11, 2020
From: ROYAL BANK OF CANADA
To: TESSERA, INC.; INVENSAS BONDING TECHNOLOGIES, INC. (F/K/A ZIPTRONIX, INC.); FOTONATION CORPORATION (F/K/A DIGITALOPTICS CORPORATION AND F/K/A DIGITALOPTICS CORPORATION MEMS); INVENSAS CORPORATION; TESSERA ADVANCED TECHNOLOGIES, INC; DTS, INC.; DTS LLC; PHORUS, INC.; IBIQUITY DIGITAL CORPORATION
Reel/Frame 052920/0001 →
SECURITY INTEREST Recorded Jun 1, 2020
From: ROVI SOLUTIONS CORPORATION; ROVI TECHNOLOGIES CORPORATION; ROVI GUIDES, INC.; TIVO SOLUTIONS INC.; VEVEO, INC.; INVENSAS CORPORATION; INVENSAS BONDING TECHNOLOGIES, INC.; TESSERA, INC.; TESSERA ADVANCED TECHNOLOGIES, INC.; DTS, INC.; PHORUS, INC.; IBIQUITY DIGITAL CORPORATION
To: BANK OF AMERICA, N.A.
Reel/Frame 053468/0001 →
SECURITY INTEREST Recorded Dec 2, 2016
From: INVENSAS CORPORATION; TESSERA, INC.; TESSERA ADVANCED TECHNOLOGIES, INC.; ZIPTRONIX, INC.; DIGITALOPTICS CORPORATION; DIGITALOPTICS CORPORATION MEMS; DTS, LLC; DTS, INC.; PHORUS, INC.; IBIQUITY DIGITAL CORPORATION
To: ROYAL BANK OF CANADA, AS COLLATERAL AGENT
Reel/Frame 040797/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 30, 2008
From: CARLSON, WILLIAM WALTER
To: TESSERA, INC.
Reel/Frame 021615/0076 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 20, 2008
From: HONER, KENNETH ALLEN; GAO, GUILIAN; WARNER, MICHAEL
To: TESSERA, INC.
Reel/Frame 020994/0053 →