IP Library Patent Application 11973913
Patent Application
App. No. 11/973,913

System and architecture for managing distributed design chains

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Quick Facts
Patent No.
US None
App. No.
11/973,913
Abstract

Systems, architectures, and data structures are described which are used to manage distributed design chains, specifically for domains in which data reside in multiple applications and are linked through complex interrelationships. The design chains or design networks integrated by the invention may include multiple companies in multiple sites collaborating to design and develop a new product. The invention is intended to integrate seamlessly and transparently with existing, diverse legacy applications, which include inter-linked data relevant to the design, thereby addressing the needs identified above.

Claims (22)

1 . A computer network system for monitoring a status of a product design, wherein the product design is encoded in one or more electronic formats, the computer network system comprising:

a plurality of nodes arranged in a hierarchical order, wherein a plurality of nodes at a lowest level of the hierarchical order obtain data on the product design from a plurality of software resources, the plurality of software resources including an human resources tool, an issue tracking tool, and a project planning tool;

a plurality of instruction primitives which may be executed in one or more of the nodes, the plurality of instruction primitives including an aggregate instruction for aggregating data received at the plurality of nodes, an extract instruction for retrieving data from the plurality of software resources, and an rule instruction for applying a conditional clause to data received from one or more nodes;

an event monitor to trigger execution of one or more of the plurality of instruction primitives in one or more of the nodes in response to an event;

wherein a single node at a highest level of the hierarchical order produces the status of the product design at the occurrence of the event.

2 . The computer network system of claim 1 wherein the hierarchical order comprises a directed acyclic graph.

3 . The computer network system of claim 1 , wherein each of the plurality of software sources operates on a distinct server from a plurality of servers, the plurality of servers in communication via a network.

4 . The computer network system of claim 3 , wherein the network at least partially includes a local area network.

5 . The computer network system of claim 3 , wherein the network at least 20 partially includes a wide-area network.

6 . The computer network system of claim 5 , wherein the wide area network communicates via TCP/IP

7 . The computer network system of claim 3 , wherein the plurality of nodes are distributed amongst the plurality of servers.

8 . The computer network system of claim 1 , wherein the event monitor is configured to detect asynchronous events.

9 . The computer network system of claim 8 , wherein the asynchronous events include an update to one or more of the software resources.

10 . The computer network system of claim 1 , wherein the event monitor is configured to detect synchronous events.

11 . The computer network system of claim 1 , wherein the single node at the highest level of hierarchy is in communication with a User Interface process, such that the status of the product design is displayed on the User Interface after the occurrence of the triggering event.

12 . The computer network system of claim 11 , wherein the User Interface comprises a web browser.

13 . The computer network system of claim 1 , wherein the software resources include one or more of an ERP tool, an issue tracking tool, a project management tool, an EDA tool.

14 . The computer network system of claim 1 , wherein the product design is a hardware product design.

15 . The computer network system of claim 14 , wherein the hardware product design is for one or more integrated circuits.

16 . The computer network system of claim 15 , wherein the product design is encoded in a hardware design language.

17 . The computer network system of claim 16 , wherein the hardware design language is VERILOG.

18 . The computer network system of claim 1 , wherein the product design is for a software product.

Assignments (8)
RELEASE OF SECURITY INTEREST Recorded Aug 4, 2017
From: SILICON VALLEY BANK
To: COLLABNET, INC.
Reel/Frame 043194/0905 →
RELEASE OF SECURITY INTEREST Recorded Aug 3, 2017
From: SILICON VALLEY BANK
To: COLLABNET, INC.
Reel/Frame 043192/0399 →
RELEASE OF SECURITY INTEREST Recorded Jul 7, 2017
From: LEADER VENTURES, LLC
To: COLLABNET, INC.
Reel/Frame 042931/0453 →
SECURITY AGREEMENT Recorded Oct 28, 2014
From: COLLABNET HOLDINGS, INC.; COLLABNET, INC.
To: SILICON VALLEY BANK
Reel/Frame 034069/0460 →
SECURITY AGREEMENT Recorded Jul 20, 2010
From: COLLABNET, INC.
To: LEADER VENTURES, LLC, AS AGENT
Reel/Frame 024716/0478 →
SECURITY AGREEMENT Recorded Aug 31, 2009
From: COLLABNET, INC.
To: LEADER VENTURES, LLC
Reel/Frame 023172/0370 →
SECURITY AGREEMENT Recorded Aug 12, 2009
From: COLLABNET, INC.
To: SILICON VALLEY BANK
Reel/Frame 023088/0455 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 23, 2009
From: GANAPATHY, GOPINATH; IYER, RAJESH; KRISHNAMURTHY, RAVI; KRISHNAN, MUTHU; BALASUBRAMANIAN, VENKATESH; LAKSHMINARAYAN, RAMASUBRAMANIAM
To: COLLABNET, INC.
Reel/Frame 022999/0959 →