IP Library › Granted Patent US 8,445,332
Granted Patent B2
US 8,445,332 · App. 11/976,009 · Granted May 21, 2013

Single crystal silicon rod fabrication methods and a single crystal silicon rod structure

Inventors: Wenxu Xianyu (Suwon-si, KR); Young-soo Park (Yongin-si, KR); Hans S. Cho (Seoul, KR); Huaxiang Yin (Yongin-si, KR); Hyuck Lim (Seoul, KR)
Assignee: Samsung Electronics Co., Ltd.
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Quick Facts
Patent No.
US 8,445,332
App. No.
11/976,009
Granted
May 21, 2013
Kind
B2
Abstract

A method of fabricating a single crystal silicon rod may include forming an insulation layer on a substrate, forming a hole in the insulation layer, selectively growing silicon in the hole, forming a silicon layer on the hole and on the insulation layer, forming a rod pattern on the silicon layer in a direction that is non-radial with respect to the hole, and melting the silicon layer and crystallizing the silicon layer by illuminating a laser beam on the silicon layer where the rod pattern is formed to generate a nucleation site at a position corresponding to the hole. According to the method, a single crystal silicon rod having no defects may be formed.

Claims (29)

1. A method of fabricating a single crystal silicon rod comprising:

forming an insulation layer on a substrate;

forming a hole in the insulation layer;

selectively growing silicon in the hole;

forming a silicon layer on the hole and on the insulation layer;

forming a rod pattern on the silicon layer in a direction that is non-radial with respect to the hole; and

melting the silicon layer and crystallizing the silicon layer by illuminating a laser beam on the silicon layer where the rod pattern is formed to generate a nucleation site at a position corresponding to the hole and the lengthwise direction of the rod is not a radial direction extending from the hole, the rod pattern being formed of single crystalline silicon,

wherein a grain boundary is filtered at a channel start portion, the channel start portion being a start portion of the rod during the crystallization of the silicon layer.

2. The method of claim 1 , wherein the depth of the hole is smaller than the thickness of the insulation layer.

3. The method of claim 2 , wherein the insulation layer includes a first insulation layer and a second insulation layer between the first insulation layer and the silicon layer.

4. The method of claim 3 , wherein the first insulation layer is formed of SiO 2 and the second insulation layer is formed of Si 3 N 4 .

5. The method of claim 1 , wherein the hole penetrates the insulation layer.

6. The method of claim 5 , further comprising:

a polycrystalline silicon layer between the substrate and the insulation layer.

7. The method of claim 6 , further comprising:

a first insulation layer between the substrate and the polycrystalline silicon layer,

wherein the insulation layer includes:

a second insulation layer on the polycrystalline silicon layer; and

a third insulation layer between the second insulation layer and the silicon layer.

8. The method of claim 7 , wherein the second insulation layer is formed of SiO 2 and the third insulation layer is formed of Si 3 N 4 .

9. The method of claim 1 , wherein the insulation layer is formed of at least one selected from the group consisting of SiO 2 , Al 2 O 3 , Si 3 N 4 , and AlN.

10. The method of claim 1 , wherein one or more holes are formed.

11. The method of claim 1 , wherein the diameter of the hole is between about 1 nm-about 300 nm.

12. The method of claim 1 , wherein the depth of the hole is between about 10 nm-about 300 nm.

13. The method of claim 1 , wherein the silicon layer is formed of amorphous or polycrystalline silicon.

14. The method of claim 13 , wherein the width of the rod is between about 20 nm-about 150 nm.

15. The method of claim 1 , wherein the silicon layer is formed of amorphous or polycrystalline silicon germanium (SiGe).

16. The method of claim 1 , wherein one or more rods are formed.

17. The method of claim 1 , wherein the width of the rod is between about 5 nm-about 1000 nm.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 19, 2007
From: XIANYU, WENXU; PARK, YOUNG-SOO; CHO, HANS S.; YIN, HUAXIANG; LIM, HYUCK
To: SAMSUNG ELECTRONICS CO., LTD.
Reel/Frame 020034/0472 →
Priority Claims (1)
KR 10-2006-0113898 · Nov 17, 2006 · national
Continuity (1)
Related Publication 20080118754A1 · May 22, 2008