Ramping in multimode transmitters using primed filters
View Patent ↗A modulation system can switch between two modulation modes. In order to comply with limits on peak power in spectral bands outside the RF operating one the transmitter is required to ramp down to a condition of minimal power. To avoid fixed ramping and trailing bits, the transmitting signal is subjected to FIR filtering. The two FIR filters are primed with a sequence using a parallel input mode before serially entering the information data.
1. A modulator apparatus comprising:
a first digital filter associated with a predetermined modulation scheme, the first filter having a first shift register including a first plurality of taps and arranged to generate, when in use, a first impulse response in response to a first input stimulus; and
the first plurality of taps being capable of being substantially simultaneously initialized by an initialization-reset feature of the first shift register, when in use, to a first priming bit pattern prior to receipt of a stream of serial input data, the initialization of the first plurality of taps being in response to a first control signal;
the first priming bit pattern corresponding to a predetermined profile of a part of the first impulse response.
2. The modulator apparatus as claimed in claim 1 , wherein the first filter comprises a first input for serial receipt of a stream of data.
3. The modulator apparatus as claimed in claim 1 , wherein the first priming bit pattern corresponds to a substantially flat amplitude modulation impulse response.
4. The modulator apparatus as claimed in claim 1 , wherein the first impulse response comprises at least one of a first primed portion and a second primed portion separated from the first primed portion by an information burst portion.
5. An The modulator apparatus as claimed in claim 1 , further comprising:
a local controller coupled to the first filter.
6. An The modulator apparatus as claimed in claim 1 , further comprising:
a data path conditioner arranged to translate, when in use, a stream of baseband data into the serial stream of input data having a format compatible with the first filter.
7. The modulator apparatus as claimed in claim 6 , wherein the data path conditioner is arranged to differentially encode the stream of baseband data.
8. The modulator apparatus as claimed in claim 6 , wherein the data path conditioner is arranged to perform a phase map and phase rotation operations in relation to the stream of baseband data.
9. The modulator apparatus as claimed in claim 8 , wherein the data path conditioner is arranged to 8PSK phase map the stream of baseband data.
10. The modulator apparatus as claimed in claim 1 , further comprising:
a source of a second priming bit pattern.
11. The modulator apparatus as claimed in claim 10 , wherein the source of the second priming bit pattern is arranged to append, when in use, the second priming bit pattern to a plurality of baseband information bits in response to a second control signal.
12. The modulator apparatus as claimed in claim 1 , further comprising:
a second digital filter associated with a second predetermined modulation scheme, the second filter having a second plurality of taps and arranged to generate, when in use, a second impulse response in response to a second input stimulus; wherein
the second plurality of taps is capable of being substantially simultaneously initialized, when in use, to a second priming bit pattern prior to receipt of another stream of serial input data, the initialization of the second plurality of taps being in response to a third control signal.
13. The modulator apparatus as claimed in claim 12 , wherein the second digital filter is a second finite impulse response filter.
14. The modulator apparatus as claimed in claim 12 , wherein the second plurality of taps is a second shift register, the second plurality of taps being initialized by using an initialization-reset feature of the second shift register.
15. The modulator apparatus as claimed in claim 1 , wherein the first filter is a first finite impulse response filter.
16. A modulation system comprising the modulator apparatus as claimed in claim 1 , the system further comprising:
a controller coupled to the modulator apparatus for controlling application of the first and/or second priming bit patterns to the first filter.
17. A GMSK or EDGE modulator comprising the modulator apparatus as claimed in claim 1 .
18. A wireless communications apparatus comprising the modulator apparatus as claimed in claim 1 .
19. A method of controlling an output of a modulator having a finite impulse response (FIR) filter, the method comprising:
receiving at the modulator a stream of baseband information corresponding to a slot of data; and
coupling in response to a first control signal the stream of baseband information to a first tap of a plurality of taps of the FIR filter, and applying a first priming bit pattern substantially simultaneously to the remaining taps of the plurality of taps of the FIR filter,
the first priming bit pattern corresponding to a predetermined profile of a part of a first impulse response.
20. The method of claim 19 further comprising:
determining an end of an active portion of the stream of baseband information; and
coupling, in response to the determining, a stream of priming bits to the first tap in place of a plurality of trailing bits included within the stream of baseband information.
21. A method comprising:
receiving at a modulator a stream of baseband information including a plurality of frames, each frame of the plurality of frames including a plurality of trailing bits; and
providing a first impulse response at a digital filter based on the stream of baseband information and based on a set of priming bits, wherein a portion of the plurality of trailing bits is substituted with the set of priming bits, and wherein the set of priming bits is applied substantially simultaneously to a plurality of taps of a shift register included at the digital filter.