Low dark current pixel with a guard drive active photodiode
View Patent ↗A method and apparatus for reducing thermally generated dark current in a CMOS imaging device is disclosed. A photodiode within the imaging device is kept zero-biased, so that the voltage is equal at both ends of the photodiode. This zero-biasing is accomplished using several different techniques, including, alternatively: a transistor operating at its sub-threshold level; a leaky diode; a short-channel MOSFET; or ramping charge injection.
1. An imaging pixel comprising:
a photo conversion device for producing an electrical signal at a first node thereof in response to incident light energy;
a biasing transistor operating at sub-threshold level and connected to a second node of said photo conversion device, for maintaining a zero-bias across said photo conversion device;
an NMOS source follower transistor located remotely from said photo conversion device and connected to said first node of said photo conversion device, for reading a signal from said photo conversion device;
an NMOS selection transistor connected to said NMOS source follower transistor, for selecting a pixel of said imaging pixel;
an electrical circuit for receiving said electrical signal at said first node and producing an imaging pixel output signal; and
a circuit path for providing said imaging pixel output signal to said second node of said photo conversion device.
2. The imaging pixel of claim 1 , wherein said bias transistor has a first source/drain region connected to said second node, a second source/drain region connected to ground, and a gate for receiving a bias control signal.
3. The imaging pixel of claim 1 , wherein said bias transistor has a substrate coupled to ground.
4. An imaging pixel comprising:
a photo conversion device for producing an electrical signal at a first node thereof in response to incident light energy;
a biasing transistor operating at sub-threshold level and connected to a second node of said photo conversion device, for maintaining a zero-bias across said photo conversion device;
an PMOS source follower transistor located remotely from said photo conversion device and connected to said first node of said photo conversion device, for reading a signal from said photo conversion device;
an PMOS selection transistor connected to said PMOS source follower transistor, for selecting a pixel of said imaging pixel;
an electrical circuit for receiving said electrical signal at said first node and producing an imaging pixel output signal; and
a circuit path for providing said imaging pixel output signal to said second node of said photo conversion device.
5. The imaging pixel of claim 4 , further comprising a read out circuit for receiving said imaging pixel output signal and selectively outputting said imaging pixel output signal.
6. The imaging pixel of claim 5 , wherein said read out circuit comprises an access transistor for receiving a signal representing said imaging pixel output signal and selectively providing said received signal as said imaging pixel output signal.
7. The imaging pixel of claim 6 , wherein said read out circuit further comprises another source follower transistor for providing said imaging pixel output signal to said access transistor.
8. The imaging pixel of claim 6 , wherein said access transistor and source follower transistors are n-type transistors having a substrate coupled to ground.
9. A method for operating an imaging pixel comprising:
producing an electrical signal at a first node of a photodiode in response to incident light energy;
maintaining a zero voltage bias across said photodiode contained within said imaging pixel by operating said photodiode at a sub-threshold level;
resetting said photodiode;
reading out said electrical signal; and
using said electrical signal to produce an imaging pixel output signal with a conversion gain, wherein said conversion gain is determinable.