Semiconductor device having a indicator indicating cleavage direction
An indicator that denotes the cleavage direction is arranged along with an integrated circuit of a semiconductor chip. This indicator makes it possible to cut the semiconductor chip along the cleavage direction even if the integrated circuit is arranged not to be in the cleavage direction.
1 . A semiconductor device, comprising:
an integrated circuit including a semiconductor circuit and an interconnect pattern, said integrated circuit being defined by a scribeline; and
an indicator, adjacent to said integrated circuit, which denotes a cleavage direction of said semiconductor device.
2 . The semiconductor device according to claim 1 , wherein said indicator is placed on at least one of a circuit face of said semiconductor device and a rear face of said circuit face of said semiconductor device.
3 . The semiconductor device according to claim 1 , wherein a line direction of said scribeline differs from said cleavage direction.
4 . The semiconductor device according to claim 1 , wherein a pattern direction of said interconnect pattern differs from said cleavage direction.
5 . The semiconductor device according to claim 1 , wherein said semiconductor circuit includes a rectangular shape having four sides, a direction of said four sides differing from said cleavage direction.
6 . The semiconductor device according to claim 1 , wherein said indicator is arranged along with said integrated circuit.
7 . The semiconductor device according to claim 1 , wherein said indicator is arranged along with said interconnect pattern.
8 . The semiconductor device according to claim 1 , wherein said indicator comprises a portion of said interconnect pattern.
9 . The semiconductor device according to claim 1 , wherein said indicator comprises a dummy interconnection pattern that functions as other than a portion of said integrated circuit.
10 . The semiconductor device according to claim 1 , wherein said indicator comprises an aggregate of a plurality of interconnect patterns.
11 . The semiconductor device according to claim 1 , wherein said indicator comprises a gap portion formed on an aggregate of a plurality of said interconnect patterns.
12 . The semiconductor device according to claim 1 , wherein said indicator is located outside of said integrated circuit.
13 . The semiconductor device according to claim 1 , wherein said indicator is arranged in a linear shape parallel to said cleavage direction.
14 . The semiconductor device according to claim 1 , wherein said indicator is arranged in a separated pair in a linear shape parallel to said cleavage direction.
15 . The semiconductor device according to claim 1 , wherein said indicator is arranged on a top-most interconnect layer of said semiconductor device.
16 . The semiconductor device according to claim 1 , wherein said indicator comprises a structure of a insulating substance filled into holes or pits formed in said semiconductor device.
17 . A semiconductor chip, comprising:
a semiconductor substrate, which has an edge having a direction different from a cleavage direction of said semiconductor substrate; and
an indicator which denotes said cleavage direction of said semiconductor substrate.
18 . The semiconductor chip as claimed in claim 17 , wherein said semiconductor substrate includes a rectangular shape having four sides, a direction of said four sides differing from said cleavage direction.
19 . The semiconductor chip as claimed in claim 17 , further comprising an interconnect pattern having a wiring level which is same as a level of said indicator.
20 . The semiconductor chip as claimed in claim 18 , wherein said indicator is formed at each of sides of opposing sides of said four sides.