IP Library Granted Patent US 8,531,019
Granted Patent B2
US 8,531,019 · App. 12/004,960 · Granted Sep 10, 2013

Heat dissipation methods and structures for semiconductor device

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Quick Facts
Patent No.
US 8,531,019
App. No.
12/004,960
Granted
Sep 10, 2013
Kind
B2
Abstract

A semiconductor device with efficient heat dissipating structures is disclosed. The semiconductor device includes a first semiconductor chip that is flip-chip mounted on a first substrate, a heat absorption portion that is formed between the first semiconductor chip and the first substrate, an outer connection portion that connects the first semiconductor chip to an external device and a heat conduction portion formed between the heat absorption portion and the outer connection portion to dissipate heat generated by the first semiconductor chip.

Claims (19)

1. A semiconductor device comprising:

a first semiconductor chip that is flip-chip mounted on a first substrate;

a second substrate formed above the first semiconductor chip;

a second semiconductor chip mounted on the second substrate;

a heat absorption portion that is formed between the first semiconductor chip and the first substrate, wherein the heat absorption portion underlies a substantial portion of the first semiconductor chip, and wherein the heat absorption portion directly overlies the first substrate, wherein the heat absorption portion comprises one or more spaces in the heat absorption portion;

an outer connection portion that connects the first semiconductor chip to an external device; and

a heat conduction portion formed between the heat absorption portion and the outer connection portion to dissipate heat generated by the first semiconductor chip, wherein the heat conduction portion is formed only within the first substrate.

2. The semiconductor device of claim 1 , further comprising a first insulating film formed between the first semiconductor chip and the heat absorption portion.

3. The semiconductor device of claim 2 , wherein the heat absorption portion comprises an adhesion portion that aids an adhesion between the first insulating film and the heat absorption portion.

4. The semiconductor device of claim 3 , wherein the adhesion portion comprises at least one space formed on the heat absorption portion.

5. The semiconductor device of claim 1 , wherein the heat absorption portion or the heat conduction portion is made of a metal.

6. The semiconductor device of claim 5 , wherein the metal comprises at least one of copper and gold.

7. The semiconductor device of claim 1 , wherein the first semiconductor chip comprises a logical integrated circuit.

8. The semiconductor device of claim 1 , wherein the second semiconductor chip comprises a memory chip.

9. The semiconductor device of claim 1 further comprising a recess formed on the second substrate above and primarily between outer edges of a top surface of the first semiconductor chip, wherein the recess is an open space directly above the top surface of the first semiconductor chip and below the second substrate.

10. The semiconductor device of claim 9 , wherein the recess is formed by applying a second insulating film on edges of the second substrate facing the edges of the first semiconductor chip.

11. The semiconductor device of claim 10 , wherein the second insulating film is made of a solder resist.

12. The semiconductor device of claim 11 , wherein the recess of the second substrate is an opening portion formed on the second insulating film.

13. The semiconductor device of claim 12 , wherein the recess forms the opening between the first semiconductor chip and the second substrate such that heat generated by the first semiconductor chip is dissipated via the opening.

Assignments (8)
RELEASE OF SECURITY INTEREST Recorded Mar 16, 2022
From: MUFG UNION BANK, N.A.
To: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
Reel/Frame 059410/0438 →
CORRECTIVE ASSIGNMENT TO CORRECT THE 8647899 PREVIOUSLY RECORDED ON REEL 035240 FRAME 0429. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTERST. Recorded Nov 3, 2020
From: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 058002/0470 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN INTELLECTUAL PROPERTY Recorded Oct 28, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: MUFG UNION BANK, N.A.
Reel/Frame 050896/0366 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 2, 2015
From: SPANSION, LLC
To: CYPRESS SEMICONDUCTOR CORPORATION
Reel/Frame 036052/0016 →
SECURITY INTEREST Recorded Mar 21, 2015
From: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 035240/0429 →
RELEASE OF SECURITY INTEREST Recorded Mar 13, 2015
From: BARCLAYS BANK PLC
To: SPANSION LLC; SPANSION INC.; SPANSION TECHNOLOGY LLC
Reel/Frame 035201/0159 →
SECURITY AGREEMENT Recorded Jun 4, 2010
From: SPANSION LLC; SPANSION INC.; SPANSION TECHNOLOGY INC.; SPANSION TECHNOLOGY LLC
To: BARCLAYS BANK PLC
Reel/Frame 024522/0338 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 21, 2008
From: ONODERA, MASANORI
To: SPANSION LLC
Reel/Frame 020685/0482 →