IP Library Granted Patent US 7,870,363
Granted Patent B2
US 7,870,363 · App. 12/006,017 · Granted Jan 11, 2011

Methods and arrangements to remap non-volatile storage

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Quick Facts
Patent No.
US 7,870,363
App. No.
12/006,017
Granted
Jan 11, 2011
Kind
B2
Abstract

Methods and arrangements for remapping the map between logical space and physical space in non-volatile storage are described. Embodiments include transformations, code, state machines or other logic to divide the non-volatile storage of the computing device into two portions, a fixed portion and a floating portion. The embodiments may also include remapping in system firmware of the computing device the current map from logical space to physical space of the floating portion of the non-volatile storage. The embodiments may also include storing the revised map. The embodiments may also include using the revised map to access the floating portion of the non-volatile storage.

Claims (52)

1. A method of addressing non-volatile storage of a computing device, the method comprising:

dividing a portion of non-volatile storage of the computing device into two portions, a fixed portion and a floating portion;

remapping in system firmware of the computing device the current map from logical space to physical space of the floating portion of non-volatile storage, thereby creating a revised map, wherein the portion of physical space mapped from the floating portion of logical space under the revised map is the same portion of physical space as the portion of physical space mapped from the floating portion of logical space under the current map;

storing the revised map; and

accessing the floating portion of the portion of non-volatile storage by using the revised map.

2. The method of claim 1 , wherein the dividing comprises dividing the non-volatile storage into a fixed portion and a floating portion, wherein the fixed portion comprises a reset vector, processor initialization components, chipset initialization components, and memory initialization components.

3. The method of claim 1 , wherein the remapping comprises remapping the current map from logical memory to physical memory periodically.

4. The method of claim 1 , wherein the remapping comprises remapping the current map from logical memory to physical memory based upon executing in physical memory a certain number of writes or erasures or a combination of both writes and erasures subsequent to creation of the current map.

5. The method of claim 1 , wherein:

the remapping comprises inducing a rotation of elements of the floating portion of physical space via mapping the image of an element of logical space under the current map to the image of the element of logical space under the revised map, the rotation comprising one of the following maps:

each element of the floating portion of physical space except the highest element is mapped to the next highest element of the floating portion of physical space; or each element of the floating portion of physical space except the lowest is mapped to the next lower element of the floating portion of physical space.

6. The method of claim 1 , wherein the remapping comprises mapping elements of the floating portion of logical space to elements of the floating portion of physical space based upon usage, wherein an element of logical space with a higher usage is mapped to an element of physical space with a lower usage, and an element of logical space with a lower usage is mapped to an element of physical space with a higher usage.

7. The method of claim 6 , wherein the remapping comprises:

ordering the elements of the floating portion of logical space by usage from lowest to highest;

ordering the elements of the floating portion of physical space by usage from highest to lowest; and

for each number i from 1 to the number of elements of the floating portion of logical space, mapping the ith element of the ordered list of elements of logical space to the ith element of the ordered list of elements of physical space.

8. The method of claim 1 , wherein:

the elements of the fixed portion and the floating portion comprise blocks; and

the revised map maps the blocks of logical space onto the blocks of physical space.

9. The method of claim 1 , wherein:

the fixed portion of non-volatile storage comprises a single block of non-volatile storage; and

the floating portion of non-volatile storage comprises firmware to be executed after initializing a portion of system firmware to translate logical space to physical space based upon the revised map from logical space to physical space, and non-volatile memory other than firmware code.

10. An apparatus for addressing non-volatile storage of a computing device, the apparatus comprising:

non-volatile storage, a portion of the non-volatile storage to be divided into two portions, a fixed portion and a floating portion;

a remapping layer, the remapping layer a component of system firmware of the computing device, the remapping layer to:

remap the current map from logical space to physical space of the floating portion of the non-volatile storage, thereby creating a revised map, wherein the portion of physical space mapped from the floating portion of logical space under the revised map is the same portion of physical space as the portion of physical space mapped from the floating portion of logical space under the current map;

store the revised map; and

access the floating portion of the non-volatile storage by using the revised map.

11. The apparatus of claim 10 , wherein the non-volatile storage comprises flash memory.

12. The apparatus of claim 10 , wherein the remapping layer comprises software intermediate between non-volatile memory and device drivers for the non-volatile memory.

13. The apparatus of claim 10 , wherein the remapping layer comprises a component of BIOS.

14. The apparatus of claim 10 , wherein:

the remapping layer is to store the revised map in CMOS; and

the remapping layer is to store the revised map in non-volatile storage other than CMOS,

the storing comprising designating the revised map in non-volatile storage with a special signature for ease of recognition.

15. A computer program product for addressing non-volatile storage of a computing device, the computer program product comprising:

a tangible computer readable storage medium;

first program instructions, to divide a portion of the non-volatile storage of the computing device into two portions, a fixed portion and a floating portion;

second program instructions to remap in system firmware of the computing device the current map from logical space to physical space of the floating portion of the non-volatile storage, thereby creating a revised map, wherein the portion of physical space mapped from the floating portion of logical space under the revised map is the same portion of physical space as the portion of physical space mapped from the floating portion of logical space under the current map;

third program instructions to store the revised map; and

fourth program instructions to access the floating portion of the non-volatile storage by using the revised map; wherein the first, second, third, and fourth program instructions are stored on the tangible computer readable storage medium.

16. The computer program product of claim 15 , wherein the first program instructions comprise program instructions to divide the non-volatile storage into a fixed portion and a floating portion, wherein the fixed portion comprises a single block of non-volatile storage comprising a reset vector, processor initialization components, chipset initialization components, and memory initialization components; and

the floating portion of non-volatile storage comprises firmware to be executed after initializing a portion of system firmware to translate logical space to physical space based upon the revised map from logical space to physical space, and non-volatile memory other than firmware code.

17. The computer program product of claim 15 , wherein the second program instructions comprise program instructions to remap the current map from logical memory to physical memory periodically.

18. The computer program product of claim 15 , wherein the second program instructions comprise program instructions to remap the current map from logical memory to physical memory based upon executing in physical memory a certain number of writes or erasures or a combination of both writes and erasures subsequent to creation of the current map.

19. The computer program product of claim 15 , wherein the second program instructions comprise instructions to induce a rotation of elements of the floating portion of physical space via mapping the image of an element of logical space under the current map to the image of the element of logical space under the revised map, the rotation comprising one of the following maps:

each element of the floating portion of physical space except the highest element is mapped to the next highest element of the floating portion of physical space; or

each element of the floating portion of physical space except the lowest is mapped to the next lower element of the floating portion of physical space.

20. The computer program product of claim 15 , wherein the second program instructions comprise instructions to map elements of the floating portion of logical space to elements of the floating portion of physical space based upon usage, wherein an element of logical space with a higher usage is mapped to an element of physical space with a lower usage, and an element of logical space with a lower usage is mapped to an element of physical space with a higher usage; wherein the remapping comprises:

ordering the elements of the floating portion of logical space by usage from lowest to highest;

ordering the elements of the floating portion of physical space by usage from highest to lowest; and

for each number i from 1 to the number of elements of the floating portion of logical space, mapping the ith element of the ordered list of elements of logical space to the ith element of the ordered list of elements of physical space.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 17, 2023
From: INTEL CORPORATION
To: INTEL NDTM US LLC
Reel/Frame 064928/0832 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 30, 2009
From: TANG, JIAN; LI, YUFU; WU, PING
To: INTEL CORPORATION
Reel/Frame 022617/0972 →