Layered semiconductor wafer with low warp and bow, and process for producing it
View Patent ↗Semiconductor wafers with a diameter of at least 200 mm comprise a silicon carrier wafer, an electrically insulating layer and a semiconductor layer located thereon, the semiconductor wafer having been produced by means of a layer transfer process comprising at least one RTA step, wherein the semiconductor wafer has a warp of less than 30 μm, a DeltaWarp of less than 30 μm, a bow of less than 10 μm and a DeltaBow of less than 10 μm. Processes for the production of a semiconductor wafer of this type require specific heat treatment regimens.
1. A process for producing a semiconductor wafer having improved global geometry, comprising providing a semiconductor wafer with a diameter of at least 200 mm comprising a silicon carrier wafer portion, an electrically insulating layer, and a semiconductor layer located thereon, the semiconductor wafer having been produced by means of a layer transfer process comprising at least one RTA step, wherein the semiconductor wafer has a warp of less than 30 μm, a DeltaWarp of less than 30 μm, a bow of less than 10 μm and a DeltaBow of less than 10 μm, and heat treating the semiconductor wafer, the process comprising heat treating by at least one of
a) heat treating the semiconductor wafer at a heating rate of from 10 to 200° C./s to a temperature in the range from 1,100 to 1,250° C., holding the semiconductor wafer in this temperature range for a period of 5 s to 300 s, and cooling the semiconductor wafer at a cooling rate of from 0.5 to 25° C./s, or
b) heat treating the semiconductor wafer at a heating rate of from 10 to 200° C./s to a temperature in a first temperature range of from 1,100 to 1,250° C.; holding the semiconductor wafer in the first temperature range for a first period of 5 s to 300 s; cooling the semiconductor wafer at a first cooling rate of from 10 to 150° C./s until the temperature is in a second temperature range of from 1,000 to 1,150° C., the temperature in the second temperature range being lower than the temperature in the first temperature range; holding the semiconductor wafer in the second temperature range for a second period of 10 s to 300 s;, and cooling the semiconductor wafer at a second cooling rate of from 10 to 150° C./s, or
c) heat treating the semiconductor wafer in a first heat treatment in which the semiconductor wafer is heated at a first heating rate of from 10 to 200° C./s to a temperature in a first temperature range of from 1,100 to 1,250° C., holding the semiconductor wafer in the first temperature range for a first period of 5 s to 300 s, cooing the semiconductor wafer at a first cooling rate of from 10 to 150° C./s, and heat treating the semiconductor wafer in a second heat treatment in which the semiconductor wafer is heated at a second heating rate of from 10 to 200° C./s until the temperature has reached a value in a second temperature range of from 1,000 to 1,150° C., holding the semiconductor wafer in the second temperature range for a second period of 10 s to 300 s, and cooling the semiconductor wafer at a second cooling rate of from 10 to 150° C./s, or
d) heat treating the semiconductor wafer in a heat treatment in an atmosphere which contains more than 12,000 ppm of oxygen, in which the semiconductor wafer is heated at a heating rate of from 10 to 200° C. until the temperature has reached a value in the range from 1,100 to 1,250° C., holding the semiconductor wafer in this temperature range for a period of 5 s to 300 s, and cooling the semiconductor wafer at a cooling rate of from 10 to 150° C./s.
2. The process of claim 1 , comprising heat treating the semiconductor wafer at a heating rate of from 10 to 200° C./s to a temperature in the range from 1,100 to 1,250° C., holding the semiconductor wafer in this temperature range for a period of 5 s to 300 s, and cooling the semiconductor wafer at a cooling rate of from 0.5 to 25° C./s.
3. The process of claim 2 , in which the cooling rate is from 0.5 to 15° C./s.
4. The process of claim 2 , wherein the warp is less than 20 μm, the DeltaWarp is less than 5 μm, the bow is less than 10 μm, and the DeltaBow is less than 5 μm.
5. The process of claim 2 , wherein the carrier wafer, following heat treating of the semiconductor wafer, has a BMD density of less than 1×10 6 /cm 2 and a uniform BMD density such that the BMD density throughout the wafer differs by no more than 50% of the mean BMD density throughout the entire volume of the wafer.
6. The process of claim 1 , heat treating the semiconductor wafer at a heating rate of from 10 to 200° C./s to a temperature in a first temperature range of from 1,100 to 1,250° C.; holding the semiconductor wafer in the first temperature range for a first period of 5 s to 300 s; cooling the semiconductor wafer at a first cooling rate of from 10 to 150° C./s until the temperature is in a second temperature range of from 1,000 to 1,150° C., the temperature in the second temperature range being lower than the temperature in the first temperature range; holding the semiconductor wafer in the second temperature range for a second period of 10 s to 300 s;, and cooling the semiconductor wafer at a second cooling rate of from 10 to 150° C./s.
7. The process of claim 6 , wherein the duration of the second period is from 30 s to 120 s.
8. The process of claim 6 , wherein the warp is less than 20 μm, the DeltaWarp is less than 5 μm, the bow is less than 10 μm, and the DeltaBow is less than 5 μm.
9. The process of claim 6 , wherein the carrier wafer, following heat treating of the semiconductor wafer, has a BMD density of less than 1×10 6 /cm 1 and a uniform BMD density such that the BMD density throughout the wafer differs by no more than 50% of the mean BMD density throughout the entire volume of the wafer.
10. The process of claim 1 , comprising heat treating the semiconductor wafer in a first heat treatment in which the semiconductor wafer is heated at a first heating rate of from 10 to 200° C./s to a temperature in a first temperature range of from 1,100 to 1,250° C., holding the semiconductor wafer in the first temperature range for a first period of 5 s to 300 s, cooing the semiconductor wafer at a first cooling rate of from 10 to 150° C./s, and heat treating the semiconductor wafer in a second heat treatment in which the semiconductor wafer is heated at a second heating rate of from 10 to 200° C./s until the temperature has reached a value in a second temperature range of from 1,000 to 1,150° C., holding the semiconductor wafer in the second temperature range for a second period of 10 s to 300 s, and cooling the semiconductor wafer at a second cooling rate of from 10 to 150° C./s.
11. The process of claim 10 , wherein the warp is less than 20 μm, the DeltaWarp is less than 5 μm, the bow is less than 10 μm, and the DeltaBow is less than 5 μm.
12. The process of claim 10 , wherein the carrier wafer, following heat treating of the semiconductor wafer, has a BMD density of less than 1×10 6 /cm 2 and a uniform BMD density such that the BMD density throughout the wafer differs by no more than 50% of the mean BMD density throughout the entire volume of the wafer.
13. The process of claim 1 , comprising heat treating the semiconductor wafer in a heat treatment in an atmosphere which contains more than 12,000 ppm of oxygen, in which the semiconductor wafer is heated at a heating rate of from 10 to 200° C. until the temperature has reached a value in the range from 1,100 to 1,250° C., holding the semiconductor wafer in this temperature range for a period of 5 s to 300 s, and cooling the semiconductor wafer at a cooling rate of from 10 to 150° C./s.
14. The process as claimed in claim 13 , wherein the atmosphere contains at least 20,000 ppm of oxygen.
15. The process of claim 13 , wherein the warp is less than 20 μm, the DeltaWarp is less than 5 μm, the bow is less than 10 μm, and the DeltaBow is less than 5 μm.
16. The process of claim 13 , wherein the carrier wafer, following heat treating of the semiconductor wafer, has a BMD density of less than 1×10 6 /cm 2 and a uniform BMD density such that the BMD density throughout the wafer differs by no more than 50% of the mean BMD density throughout the entire volume of the wafer.
17. The process of claim 1 , wherein the carrier wafer, has a BMD density of less than 1×10 5 /cm 2 .
18. The process of claim 17 , wherein the carrier wafer has an interstitial oxygen concentration in the range of 3×10 17 cm 3 and 8×10 17 /cm 3 .
19. The process of claim 17 , wherein the carrier wafer has an interstitial oxygen concentration in the range of 5×10 17 /cm 3 and 7×10 17 /cm 3 .
20. The process of claim 18 , wherein the carrier wafer has a nitrogen concentration in the range from 5×10 14 /cm 3 to 5×10 15 /cm 3 .