Semiconductor device and method for manufacturing the same
View Patent ↗In a MIS-type semiconductor device having a trench gate structure, a withstand voltage is ensured without changing the thickness of a drift layer and on-resistance can be reduced without applying a high gate drive voltage. The lower half of a trench extending through a p-base region into an n-drift region is filled with a high-permittivity dielectric having a relative permittivity that is higher than that of a silicon oxide film, preferably a silicon nitride film, and an insulated gate structure including a gate insulator and a gate electrode is fabricated on the high-permittivity dielectric. The depth d 2 of the deepest portion of the high-permittivity dielectric is designed to be deeper than the depth d 1 of a depletion layer in the semiconductor region away from the high-permittivity dielectric.
1. A semiconductor device comprising: a drift region of a first conductivity type; a base region of a second conductivity type formed on a first principal surface of the drift region; a source region of the first conductivity type formed on a surface layer of the base region; a drain region of the first conductivity type formed on a second principal surface of the drift region; a trench, formed adjacent to the source region and extending from the first principal surface through the base region into the drift region; a high-permittivity dielectric filled in the lower half of the trench; and an insulated gate structure including a gate insulator and a gate electrode formed only in the upper half of the trench, wherein the relative permittivity of the high-permittivity dielectric is greater than that of a silicon oxide film.
2. A semiconductor device comprising:
a drift region of a first conductivity type; a base region of a second conductivity type formed on a first principal surface of the drift region; a source region of the first conductivity type formed on a surface layer of the base region; a drain region of the first conductivity type formed on a second principal surface of the drift region; a trench, formed adjacent to the source region and extending from the first principal surface through the base region into the drift region; a high-permittivity dielectric filled in the lower half of the trench; and an insulated gate structure including a gate insulator and a gate electrode formed only in the upper half of the trench, wherein the relative permittivity of the high-permittivity dielectric is greater than that of a silicon nitride film.
3. A semiconductor device comprising: a drift region of a first conductivity type; a base region of a second conductivity type formed on a first principal surface of the drift region; an emitter region of the first conductivity type formed on a surface layer of the base region; a collector region of the second conductivity type formed on a second principal surface of the drift region; a trench, formed adjacent to the emitter region, extending from the first principal surface through the base region into the drift region; a high-permittivity dielectric filled in the lower half of the trench; and an insulated gate structure including a gate insulator and a gate electrode formed only in the upper half of the trench, wherein the relative permittivity of the high-permittivity dielectric is greater than that of a silicon oxide film.
4. A semiconductor device comprising:
a drift region of a first conductivity type; a base region of a second conductivity type formed on a first principal surface of the drift region; an emitter region of the first conductivity type formed on a surface layer of the base region; a collector region of the second conductivity type formed on a second principal surface of the drift region; a trench, formed adjacent to the emitter region, extending from the first principal surface through the base region into the drift region; a high-permittivity dielectric filled in the lower half of the trench; and an insulated gate structure including a gate insulator and a gate electrode formed only in the upper half of the trench, wherein the relative permittivity of the high-permittivity dielectric is greater than that of a silicon nitride film.
5. the semiconductor device according to claim 1 or 2 , wherein the high-permittivity dielectric is in contact with the drain region.
6. the semiconductor device according to claim 3 or 4 , wherein the high-permittivity dielectric is in contact with the collector region.
7. The semiconductor device according to claim 1 , 2 , 3 or 4 , wherein the deepest portion of the high-permittivity dielectric is deeper than the edge of a depletion layer extending into the drift region in the off-state.
8. the semiconductor device according to claim 1 , 2 , 3 , or 4 , wherein the high-permittivity dielectric is in contact with the gate electrode.
9. A semiconductor device according to claim 1 , comprising a plurality of high-permittivity dielectrics filled in the lower half of the trench.
10. A semiconductor device according to claim 2 , comprising a plurality of high-permittivity dielectrics filled in the lower half of the trench.
11. A semiconductor device according to claim 3 , comprising a plurality of high-permittivity dielectrics filled in the lower half of the trench.
12. A semiconductor device according to claim 4 , comprising a plurality of high-permittivity dielectrics filled in the lower half of the trench.
13. the semiconductor device according to claim 9 , wherein one of the plurality of high-permittivity dielectrics is in contact with the drain region.
14. the semiconductor device according to claim 11 , wherein one of the plurality of high-permittivity dielectrics is in contact with the collector region.
15. the semiconductor device according to claim 9 , wherein one of the plurality of high-permittivity dielectrics is in contact with the gate electrode.
16. The semiconductor device according to claim 9 , wherein the deepest portion of the high-permittivity dielectric, provided at the deepest position, of the plurality of the high-permittivity dielectrics is deeper than the edge of a depletion layer extending into the drift region in the off-state.
17. A method for manufacturing the semiconductor device comprising: providing a first semiconductor layer of a first conductivity type as a drift region; providing a second semiconductor layer of a second conductivity type on the first semiconductor layer as a base region; forming a trench from a surface of the second semiconductor layer through the second semiconductor layer into the first semiconductor layer; filling the trench with a high-permittivity dielectric; removing the high-permittivity dielectric in the upper portion of the trench; forming a gate insulator in the part of the trench where the high-permittivity dielectric has been removed; and filling the portion of the trench that is inside the gate insulator with a gate electrode.
18. the semiconductor device according to claim 10 , wherein the high-permittivity dielectric is in contact with the drain region.
19. the semiconductor device according to claim 12 , wherein the high-permittivity dielectric is in contact with the collector region.
20. The semiconductor device according to claim 10 , wherein the deepest portion of the high-permittivity dielectric is deeper than the edge of a depletion layer extending into the drift region in the off-state.
21. The semiconductor device according to claim 11 , wherein the deepest portion of the high-permittivity dielectric is deeper than the edge of a depletion layer extending into the drift region in the off-state.
22. The semiconductor device according to claim 12 , wherein the deepest portion of the high-permittivity dielectric is deeper than the edge of a depletion layer extending into the drift region in the off-state.
23. the semiconductor device according to claim 10 , wherein the high-permittivity dielectric is in contact with the gate electrode.
24. the semiconductor device according to claim 11 , wherein the high-permittivity dielectric is in contact with the gate electrode.
25. the semiconductor device according to claim 12 , wherein the high-permittivity dielectric is in contact with the gate electrode.