Data protection after possible write abort or erase abort
View Patent ↗A portion of a nonvolatile memory array that is likely to contain, partially programmed data may be identified from a high sensitivity read, by applying stricter than usual ECC requirements, or using pointers to programmed sectors. The last programmed data may be treated as likely to be partially programmed data. Data in the identified portion may be copied to another location, or left where it is with an indicator to prohibit further programming to the same cells. To avoid compromising previously stored data during subsequent programming, previously stored data may be backed up. Backing up may be done selectively, for example, only for nonsequential data, or only when the previously stored data contains an earlier version of data being programmed. If a backup copy already exists, another backup copy is not created. Sequential commands are treated as a single command if received within a predetermined time period.
1. A method comprising:
in response to receiving power to the nonvolatile memory array, after a period without power, identifying a portion of the nonvolatile memory array that was last programmed prior to the period without power;
in response to identifying the portion of the nonvolatile memory array as the last-programmed portion prior to the period without power, identifying the last-programmed portion as an unreliable portion; and
in response to identifying the last-programmed portion of the nonvolatile memory array as an unreliable portion, copying reliable and unreliable data stored in the unreliable portion of the nonvolatile memory array from the unreliable portion of the nonvolatile memory array to a reliable portion of the nonvolatile memory array.
2. The method of claim 1 wherein the last-programmed portion of the nonvolatile memory array is identified as the last-programmed portion based on one or more pointers.
3. The method of claim 1 wherein the copying includes correcting any ECC correctable errors when or after the reliable and unreliable data is written to the reliable portion of the nonvolatile memory array.
4. The method of claim 1 further comprising, after copying the reliable and unreliable data:
erasing the unreliable portion of the nonvolatile memory prior to storing any additional data in the unreliable portion of the nonvolatile memory; and
identifying the unreliable portion as a reliable portion after the erasing.
5. The method of claim 1 further comprising, in response to identifying the last-programmed portion of the nonvolatile memory array as an unreliable portion:
performing one or more ECC operations on the unreliable data stored in the unreliable portion of the nonvolatile memory array;
detecting a number of ECC errors after performing the ECC operations;
comparing the detected number to a threshold number; and
in response to determining that the detected number is greater than the threshold number, identifying the copied unreliable data as unacceptable.
6. The method of claim 1 wherein the unreliable portion of the nonvolatile memory is in an erase block of the memory array and subsequent to the copying, additional data is written to the erase block.
7. The method of claim 5 , wherein, under normal operating conditions, after performing one or more ECC operations on the unreliable data stored in a reliable portion of the nonvolatile memory array, a second number of ECC errors is detected, and the second detected number is compared to a second threshold number that is greater than the threshold number used when the unreliable data is from an unreliable portion.
8. A system comprising:
a nonvolatile memory array; and
a memory controller configured to:
in response to receiving power to the nonvolatile memory array, after a period without power, identify a portion of the nonvolatile memory array that was last programmed prior to the period without power;
in response to identifying the portion of the nonvolatile memory array as the last-programmed portion prior to the period without power, identify the last-programmed portion as an unreliable portion; and
in response to identifying the last-programmed portion of the nonvolatile memory array as an unreliable portion, copy reliable and unreliable data stored in the unreliable portion of the nonvolatile memory array from the unreliable portion of the nonvolatile memory array to a reliable portion of the nonvolatile memory array.
9. The system of claim 8 wherein the last-programmed portion of the nonvolatile memory array is identified as the last-programmed portion based on one or more pointers.
10. The system of claim 8 wherein the memory controller is configured to correct any ECC correctable errors when or after the reliable and unreliable data is written to the reliable portion of the nonvolatile memory array.
11. The system of claim 8 wherein the memory controller is further configured to, after copying the reliable and unreliable data:
erase the unreliable portion of the nonvolatile memory prior to storing any additional data in the unreliable portion of the nonvolatile memory; and
identify the unreliable portion as a reliable portion after the erasing.
12. The system of claim 8 wherein the memory controller is further configured to, in response to identifying the last-programmed portion of the nonvolatile memory array as an unreliable portion:
perform one or more ECC operations on the unreliable data stored in the unreliable portion of the nonvolatile memory array;
detect a number of ECC errors after performing the ECC operations;
compare the detected number to a threshold number; and
in response to determining that the detected number is greater than the threshold number, identify the copied unreliable data as unacceptable in response to determining that the detected number is less than or equal to the threshold number, identify the copied data as unacceptable.
13. The system of claim 8 wherein the unreliable portion of the nonvolatile memory is in an erase block of the memory array and wherein the memory controller is further configured to, subsequent to the copying, write additional data to the erase block.
14. The system of claim 12 , wherein the memory controller is further configured to, under normal operating conditions, after performing one or more ECC operations on the unreliable data stored in a reliable portion of the nonvolatile memory array, detect a second number of ECC errors, and compare the second detected number to a second threshold number that is greater than the threshold number used when the unreliable data is from an unreliable portion.