IP Library Granted Patent US 8,606,041
Granted Patent B2
US 8,606,041 · App. 12/029,199 · Granted Dec 10, 2013

Method of local tracing of connectivity and schematic representations produced therefrom

Inventors: Edward Keyes (Ottawa, CA); Vyacheslav L. Zavadsky (Ottawa, CA)
Assignee: Semiconductor Insights, Inc.
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Quick Facts
Patent No.
US 8,606,041
App. No.
12/029,199
Granted
Dec 10, 2013
Kind
B2
Abstract

A schematic diagram detailing a circuit that was reverse engineered from a plurality of images taken of the circuit is provided. The schematic diagram includes at least one circuit element that was represented as an object in at least one of the plurality of images, such that signal continuity information was determined through local tracing of connectivity between a first image and a second image of the plurality of images. A method of tracing the connectivity within the plurality of images to produce the schematic diagram is also disclosed.

Claims (13)

1. A method of tracing connectivity within a mosaic of images to derive a data structure representative of a schematic diagram of the connectivity, the mosaic comprising a first object having a first portion in a first image, a second portion in a second image, and a third portion in a region of overlap between the first image and the second image, the first portion having a source of the first object, the method being performed by a computing device having one or more processors, the method comprising steps of:

(a) placing a representation of the first portion in a queue;

(b) marking the source;

(c) taking the representation of the first portion from the queue;

(d) marking the first portion and the third portion, wherein the first portion comprises the source and the third portion is connected to the first portion;

(e) placing a representation of the third portion in the queue;

(f) taking the representation of the third portion from the queue; and

(g) marking the third portion and the second portion, the third portion being connected to the second portion on the second image; and

(h) marking the first portion to provide a connectivity trace from the first portion to the second portion.

2. The method according to claim 1 , further comprising step (i) of performing a bundle adjustment operation for the region of overlap between the first image and the second image.

3. The method according to claim 1 , wherein a breadth first search flow is implemented.

4. The method according to claim 3 , wherein the first object represents a circuit element, and

wherein the method further comprises determining signal continuity information of the circuit element through local tracing.

Assignments (5)
RELEASE OF SECURITY INTEREST Recorded Nov 12, 2021
From: STELLUS CAPITAL INVESTMENT CORPORATION, AS ADMINISTRATIVE AGENT
To: TECHINSIGHTS INC.
Reel/Frame 058096/0558 →
SECURITY INTEREST Recorded Nov 10, 2021
From: TECHINSIGHTS INC.; VLSI RESEARCH INC.
To: CAPITAL ONE, NATIONAL ASSOCIATION
Reel/Frame 058096/0721 →
NOTICE OF GRANT OF SECURITY INTEREST IN PATENTS Recorded Aug 16, 2017
From: TECHINSIGHTS INC.
To: STELLUS CAPITAL INVESTMENT CORPORATION, AS ADMINISTRATIVE AGENT
Reel/Frame 043571/0385 →
CHANGE OF NAME Recorded Oct 9, 2014
From: SEMICONDUCTOR INSIGHTS INC.
To: TECHINSIGHTS INC.
Reel/Frame 033941/0692 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 11, 2008
From: KEYES, EDWARD; ZAVADSKY, VYACHESLAV L.
To: SEMICONDUCTOR INSIGHTS, INC.
Reel/Frame 020491/0719 →
Priority Claims (1)
CA 2605234 · Oct 3, 2007 · national
Continuity (1)
Related Publication 20090092285A1 · Apr 9, 2009