IP Library Granted Patent US 7,943,480
Granted Patent B2
US 7,943,480 · App. 12/029,800 · Granted May 17, 2011

Sub-lithographic dimensioned air gap formation and related structure

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Quick Facts
Patent No.
US 7,943,480
App. No.
12/029,800
Granted
May 17, 2011
Kind
B2
Abstract

Sub-lithographic dimensioned air gap formation and related structure are disclosed. In one embodiment, a method includes forming a dielectric layer including interconnects on a substrate; depositing a cap layer on the dielectric layer; depositing a photoresist over the cap layer; patterning the photoresist to include a first trench pattern at most partially overlying the interconnects; forming a spacer within the first trench pattern to form a second trench pattern having a sub-lithographic dimension; transferring the second trench pattern into the cap layer and into the dielectric layer between the interconnects; and depositing another dielectric layer to form an air gap by pinching off the trench in the dielectric layer.

Claims (28)

1. A method comprising:

forming a dielectric layer including interconnects on a substrate;

depositing a cap layer on the dielectric layer, wherein the cap layer includes at least three cap layers and one of the at least three cap layers includes a silicon carbide layer;

depositing a photoresist over the cap layer;

patterning the photoresist to include a first trench pattern at most partially overlying the interconnects;

forming a spacer within the first trench pattern to form a second trench pattern having a sub-lithographic dimension;

transferring the second trench pattern into the cap layer and into the dielectric layer, such that a trench is formed between the interconnects; and

depositing another dielectric layer to form an air gap by pinching off the trench in the dielectric layer.

2. The method of claim 1 , further comprising removing all of the cap layers except one prior to the depositing of the another dielectric layer.

3. The method of claim 1 , wherein the second trench pattern includes a smaller size in a lower cap layer than in a higher cap layer.

4. The method of claim 1 , wherein one of the at least three cap layers includes an organic planarizing layer.

5. The method of claim 4 , wherein the spacer forming includes forming a low temperature oxide (LTO) conformal layer on the organic planarizing layer.

6. The method of claim 1 , further comprising extracting the dielectric layer between the interconnects through the second trench pattern in the cap layer.

7. The method of claim 1 , wherein the sub-lithographic dimension is smaller than a minimum distance between the interconnects.

8. The method of claim 1 , wherein the interconnects include copper interconnects.

9. The method of claim 1 , wherein the spacer forming includes depositing a conformal layer and removing the conformal layer on a surface of the photoresist to form the second trench pattern.

10. The method of claim 1 , wherein the spacer forming includes depositing a conformal layer.

11. A method of forming an air gap containing interconnect structure, the method comprising:

forming a dielectric layer including interconnects on a substrate;

depositing a plurality of cap layers on the dielectric layer;

depositing a photoresist over the cap layers;

patterning the photoresist to include a first trench pattern at most partially overlying the interconnects;

forming a spacer within the first trench pattern to form a second trench pattern having a sub-lithographic dimension;

transferring the second trench pattern into the cap layers and into the dielectric layer, such that a trench is formed between the interconnects;

removing all of the cap layers except one prior to the depositing of the another dielectric layer; and

depositing another dielectric layer to form an air gap by pinching off the trench in the dielectric layer.

12. The method of claim 11 , further comprising extracting the dielectric layer between the interconnects through the second trench pattern in the cap layer.

13. The method of claim 11 , wherein the sub-lithographic dimension is smaller than a minimum distance between the interconnects.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 6, 2015
From: INTERNATIONAL BUSINESS MACHINES CORPORATION
To: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
Reel/Frame 036267/0191 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 15, 2008
From: EDELSTEIN, DANIEL C.; FULLER, NICHOLAS C.M.; HORAK, DAVID V.; HUANG, ELBERT E.; LI, WAI-KIN; LISI, ANTHONY D.; NITTA, SATYANARAYANA V.; PONOTH, SHOM
To: INTERNATIONAL BUSINESS MACHINES CORPORATION
Reel/Frame 020513/0933 →