MULTI-DIRECTIONAL TRENCHING OF A PLURALITY OF DIES IN MANUFACTURING SUPERJUNCTION DEVICES
A method of manufacturing a superjunction device includes providing a semiconductor wafer having a plurality of dies. A first plurality of trenches having a first orientation are formed in a first die. A second plurality of trenches having a second orientation are formed in a second die. The second orientation is different from the first orientation.
1 . A method of manufacturing a superjunction device, the method comprising:
(a) providing a semiconductor wafer, the semiconductor wafer including a plurality of dies;
(b) forming a first plurality of trenches in at least one first die, each of the first plurality of trenches having a first orientation; and
(c) forming a second plurality of trenches in at least one second die, each of the second plurality of trenches having a second orientation that is different from the first orientation.
2 . The method of claim 1 , wherein the a number of first dies containing the first plurality of trenches is equal to a number of second dies containing the second plurality of trenches.
3 . The method of claim 2 , wherein
(i) each of the first plurality of trenches has a length dimension, the length dimension of each of the first plurality of trenches being identical; and
(ii) each of the second plurality of trenches has a length dimension, the length dimension of each of the second plurality trenches being identical.
4 . The method of claim 1 , wherein the steps (a)-(c) are performed sequentially.
5 . The method of claim 1 , wherein the steps (b) and (c) are performed concurrently.
6 . The method of claim 1 , wherein prior to commencement of each of the steps (a)-(c), the respective preceding step is substantially completed.
7 . The method of claim 1 , wherein prior to commencement of each of the steps (a)-(c), the respective preceding step is fully completed.
8 . A superjunction device formed by the method of claim 1 .
9 . A superjunction device comprising:
(a) a semiconductor wafer, the semiconductor wafer including a plurality of dies;
(b) a first plurality of trenches formed in a first plurality of dies, each of the first plurality of trenches having a first orientation; and
(c) a second plurality of trenches formed in a second plurality of dies, each of the second plurality of trenches having a second orientation that is different from the first orientation.
10 . The device of claim 9 , wherein the first plurality of trenches defines a first area and the second plurality of trenches defines a second area.
11 . The device of claim 9 , wherein a ratio of the first area to the second area is one-to-one.
12 . The device of claim 9 , wherein
(i) each of the first plurality of trenches has a length dimension, the length dimension of each of the first plurality of trenches being different from at least one other of the first plurality of trenches; and
(ii) each of the second plurality of trenches has a length dimension, the length dimension of each of the second plurality of trenches being different from at least one other of the second plurality of trenches.
13 . The device of claim 9 , wherein
(i) each of the first plurality of trenches has a length dimension, the length dimension of each of the first plurality of trenches being identical; and
(ii) each of the second plurality of trenches has a length dimension, the length dimension of each of the second plurality of trenches being identical.
14 . A semiconductor device comprising:
(a) a semiconductor wafer, the semiconductor wafer including a plurality of dies;
(b) a first plurality of trenches formed in a first plurality of dies, each of the first plurality of trenches having a first orientation; and
(c) a second plurality of trenches formed in a second plurality of dies, each of the second plurality of trenches having a second orientation that is different from the first orientation.