IP Library Patent Application 12036309
Patent Application
App. No. 12/036,309

Top layers of metal for high performance IC's

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Patent No.
US None
App. No.
12/036,309
Abstract

A method of closely interconnecting integrated circuits contained within a semiconductor wafer to electrical circuits surrounding the semiconductor wafer. Electrical interconnects are held to a minimum in length by making efficient use of polyimide or polymer as an inter-metal dielectric thus enabling the integration of very small integrated circuits within a larger circuit environment at a minimum cost in electrical circuit performance.

Claims (32)

1 . A method for fabricating a semiconductor chip, comprising:

providing a silicon substrate, multiple transistors on said silicon substrate, a first metallization structure over said silicon substrate, wherein said first metallization structure comprises a first metal layer over said silicon substrate, a second metal layer over said silicon substrate and over said first metal layer, a first metal interconnect over said silicon substrate, a second metal interconnect over said silicon substrate, a third metal interconnect over said silicon substrate and between said first and second metal interconnects, and a fourth metal interconnect over said silicon substrate and between said third and second metal interconnects, wherein said first, second, third and fourth metal interconnects are separated from one another by an insulating material, and wherein said first metallization structure comprises electroplated copper, a dielectric layer between said first and second metal layers, and a passivation layer over said first metallization structure, over said dielectric layer and on said third and fourth metal interconnects, wherein said first, second, third and fourth metal interconnects are provided by a topmost metal layer under said passivation layer, and wherein said passivation layer comprises a topmost nitride layer of said semiconductor chip;

forming a polymer layer on said passivation layer and over said third and fourth metal interconnects, wherein said forming said polymer layer comprises coating a layer of photosensitive material on said passivation layer;

after said forming said polymer layer, forming a first opening through said polymer layer and through said passivation layer and a second opening through said polymer layer and through said passivation layer, wherein said first opening is over a first contact point of said first metal interconnect and exposes said first contact point, and said second opening is over a second contact point of said second metal interconnect and exposes said second contact point; and

forming a second metallization structure on said polymer layer, over said passivation layer, over said third and fourth metal interconnects and over said first and second contact points, wherein said third and fourth metal interconnects are directly under said second metallization structure and are not connected to said second metallization structure through any opening in said polymer layer under said second metallization structure, wherein said first contact point is connected to said second contact point through said second metallization structure, wherein said second metallization structure is connected to said first contact point through said first opening and connected to said second contact point through said second opening, wherein said forming said second metallization structure comprises electroplating copper in said first and second openings and over said polymer layer, and wherein a portion of said second metallization structure on said polymer layer has a thickness greater than that of said first metal layer and greater than that of said second metal layer.

2 . The method of claim 1 further comprising forming a solder bump over said second metallization structure.

3 . The method of claim 1 , wherein said forming said polymer layer comprises forming a benzocyclobutene (BCB) layer on said passivation layer and over said third and fourth metal interconnects.

4 . The method of claim 1 , wherein said forming said polymer layer comprises forming a photosensitive polymer layer on said passivation layer and over said third and fourth metal interconnects.

5 . The method of claim 1 , wherein said forming said polymer layer comprises forming a polyimide layer on said passivation layer and over said third and fourth metal interconnects.

6 . The method of claim 1 , wherein said second metallization structure comprises a ground interconnect connected to said first contact point through said first opening and connected to said second contact point through said second opening.

7 . The method of claim 1 , wherein said second metallization structure comprises a signal interconnect connected to said first contact point through said first opening and connected to said second contact point through said second opening.

8 . A method for fabricating a semiconductor chip, comprising:

providing a silicon substrate, multiple transistors on said silicon substrate, a first metallization structure over said silicon substrate, wherein said first metallization structure comprises a first metal layer over said silicon substrate, a second metal layer over said silicon substrate and over said first metal layer, a first metal interconnect over said silicon substrate, a second metal interconnect over said silicon substrate, and a third metal interconnect over said silicon substrate and between said first and second metal interconnects, wherein said first, second and third metal interconnects are separated from one another by an insulating material, and wherein said first metallization structure comprises electroplated copper, a dielectric layer between said first and second metal layers, and a passivation layer over said first metallization structure, over said dielectric layer and on said third metal interconnect, wherein said first, second and third metal interconnects are provided by a topmost metal layer under said passivation layer, and wherein said passivation layer comprises a topmost nitride layer of said semiconductor chip;

forming a polymer layer on said passivation layer and over said third metal interconnect, wherein said forming said polymer layer comprises coating a layer of photosensitive material on said passivation layer;

after said forming said polymer layer, forming a first opening through said polymer layer and through said passivation layer and a second opening through said polymer layer and through said passivation layer, wherein said first opening is over a first contact point of said first metal interconnect and exposes said first contact point, and said second opening is over a second contact point of said second metal interconnect and exposes said second contact point; and

forming a second metallization structure on said polymer layer, over said passivation layer, over said third metal interconnect and over said first and second contact points, wherein said third metal interconnect is directly under said second metallization structure and is not connected to said second metallization structure through any opening in said polymer layer under said second metallization structure, wherein said first contact point is connected to said second contact point through said second metallization structure, wherein said second metallization structure is connected to said first contact point through said first opening and connected to said second contact point through said second opening, wherein said forming said second metallization structure comprises electroplating copper in said first and second openings and over said polymer layer, and wherein a portion of said second metallization structure on said polymer layer has a thickness greater than that of said first metal layer and greater than that of said second metal layer.

9 . The method of claim 8 further comprising forming a solder bump over said second metallization structure.

10 . The method of claim 8 , wherein said forming said polymer layer comprises forming a benzocyclobutene (BCB) layer on said passivation layer and over said third metal interconnect.

11 . The method of claim 8 , wherein said forming said polymer layer comprises forming a photosensitive polymer layer on said passivation layer and over said third metal interconnect.

12 . The method of claim 8 , wherein said forming said polymer layer comprises forming a polyimide layer on said passivation layer and over said third metal interconnect.

13 . The method of claim 8 , wherein said second metallization structure comprises a ground interconnect connected to said first contact point through said first opening and connected to said second contact point through said second opening.

14 . The method of claim 8 , wherein said second metallization structure comprises a signal interconnect connected to said first contact point through said first opening and connected to said second contact point through said second opening.

15 . A method for fabricating a semiconductor chip, comprising:

providing a silicon substrate, multiple transistors on said silicon substrate, a first metallization structure over said silicon substrate, wherein said first metallization structure comprises a first metal layer over said silicon substrate, a second metal layer over said silicon substrate and over said first metal layer, a first metal interconnect over said silicon substrate, a second metal interconnect over said silicon substrate, and a third metal interconnect over said silicon substrate and between said first and second metal interconnects, wherein said first, second and third metal interconnects are separated from one another by an insulating material, a dielectric layer between said first and second metal layers, and a passivation layer over said first metallization structure, over said dielectric layer and on said third metal interconnect, wherein said first, second and third metal interconnects are provided by a topmost metal layer under said passivation layer, and wherein said passivation layer comprises a topmost nitride layer of said semiconductor chip;

forming a polymer layer on said passivation layer and over said third metal interconnect, wherein said forming said polymer layer comprises coating a layer of photosensitive material on said passivation layer;

after said forming said polymer layer, forming a first opening through said polymer layer and through said passivation layer and a second opening through said polymer layer and through said passivation layer, wherein said first opening is over a first contact point of said first metal interconnect and exposes said first contact point, and said second opening is over a second contact point of said second metal interconnect and exposes said second contact point; and

forming a second metallization structure on said polymer layer over said passivation layer, over said third metal interconnect and over said first and second contact points, wherein said third metal interconnect is directly under said second metallization structure and is not connected to said second metallization structure through any opening in said polymer layer under said second metallization structure, wherein said first contact point is connected to said second contact point through said second metallization structure, wherein said second metallization structure is connected to said first contact point through said first opening and connected to said second contact point through said second opening, wherein said forming said second metallization structure comprises electroplating copper in said first and second openings and over said polymer layer, and wherein a portion of said second metallization structure on said polymer layer has a thickness greater than that of said first metal layer and greater than that of said second metal layer.

16 . The method of claim 15 further comprising forming a solder bump over said second metallization structure.

17 . The method of claim 15 , wherein said forming said polymer layer comprises forming a benzocyclobutene (BCB) layer on said passivation layer and over said third metal interconnect.

18 . The method of claim 15 , wherein said forming said polymer layer comprises forming a polyimide layer on said passivation layer and over said third metal interconnect.

19 . The method of claim 15 , wherein said second metallization structure comprises a ground interconnect connected to said first contact point through said first opening and connected to said second contact point through said second opening.

20 . The method of claim 15 , wherein said second metallization structure comprises a signal interconnect connected to said first contact point through said first opening and connected to said second contact point through said second opening.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 11, 2014
From: MEGIT ACQUISITION CORP.
To: QUALCOMM INCORPORATED
Reel/Frame 033303/0124 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 20, 2009
From: LIN, MOU-SHIUNG, DR.
To: MEGICA CORPORATION
Reel/Frame 023119/0387 →