IP Library Granted Patent US 7,884,404
Granted Patent B2
US 7,884,404 · App. 12/037,286 · Granted Feb 8, 2011

Ferroelectric memory device and fabrication process thereof, fabrication process of a semiconductor device

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 7,884,404
App. No.
12/037,286
Granted
Feb 8, 2011
Kind
B2
Abstract

A ferroelectric memory device includes a field effect transistor formed over a semiconductor substrate and including first and second diffusion regions, an interlayer insulation film formed over the semiconductor substrate so as to cover the field effect transistor, a conductive plug formed in the interlayer insulation film in contact with the first diffusion region, and a ferroelectric capacitor formed over the interlayer insulation in contact with the conductive plug. The ferroelectric capacitor includes a ferroelectric film and upper and lower electrodes sandwiching the ferroelectric film respectively from above and below. The lower electrode is connected electrically to the conductive plug, and wherein a layer containing aluminum and oxygen is interposed between the conductive plug and the lower electrode, a layer containing nitrogen is interposed between the layer containing aluminum and oxygen and the lower electrode, and a self-aligned layer of a substance having a self-orientation is interposed between the layer containing nitrogen and the lower electrode.

Claims (33)

1. A ferroelectric memory device, comprising:

a semiconductor substrate;

a field effect transistor formed over said semiconductor substrate, said field effect transistor including first and second diffusion regions;

an interlayer insulation film formed over said semiconductor substrate so as to cover said field effect transistor;

a conductive plug formed in said interlayer insulation film in contact with said first diffusion region; and

a ferroelectric capacitor formed over said interlayer insulation in contact with said conductive plug,

said ferroelectric capacitor comprising a ferroelectric film and upper and lower electrodes sandwiching said ferroelectric film respectively from above and below,

said lower electrode being connected electrically to said conductive plug,

a layer containing aluminum and oxygen being interposed between said the conductive plug and said lower electrode,

a layer containing nitrogen being interposed between said layer containing aluminum and oxygen and said lower electrode,

a self-aligned layer of a substance having a self-orientation being interposed between said layer containing nitrogen and said lower electrode.

2. The ferroelectric memory device as claimed in claim 1 , wherein said layer containing aluminum and oxygen comprises a TiAlN film having at least one oxygen atomic layer at a surface thereof.

3. The ferroelectric memory device as claimed in claim 2 , wherein said TiAlN film has a thickness of 50-100 nm.

4. The ferroelectric memory device as claimed in claim 1 , wherein said layer containing nitrogen contains at least one layer of nitrogen atomic layer.

5. The ferroelectric memory device as claimed in claim 1 , wherein a surface of said layer containing nitrogen is terminated with hydrogen.

6. The ferroelectric memory device as claimed in claim 1 , wherein said ferroelectric film has a (111) orientation.

7. The ferroelectric memory device as claimed in claim 1 , wherein said self-aligned layer is formed of one or more substances selected from the group consisting of Ti, Ir, Pt, PZT, SrRuO 3 , Ru, TiN, TiAlN, Al, Cu and IrOx.

8. The ferroelectric memory device as claimed in claim 1 , wherein said conductive plug comprises one or more substances selected from the group consisting of Si, Ti, TiN, TiAlN, W, Al, Cu, Ru and SrRuO 3 .

9. A method of fabricating a ferroelectric memory apparatus, comprising the steps of:

forming an interlayer insulation film over a semiconductor substrate over which a transistor is formed so as to cover said transistor;

forming a conductive plug in said interlayer insulation film in contact with a diffusion region of said transistor; and

forming a ferroelectric capacitor over said conductive plug by consecutively stacking a lower electrode, a ferroelectric film and an upper electrode,

wherein there is provided, after said step of forming said conductive plug but before said step of forming said lower electrode, the steps of: forming a layer containing aluminum and oxygen on said interlayer insulation film and a surface of said conductive plug; forming a layer containing nitrogen on a surface of said layer containing aluminum and oxygen; and forming a self-alignment film over said layer containing nitrogen.

10. The method as claimed in claim 9 , wherein said step of forming said layer containing oxygen comprises the steps of deposing a TiAlN on said surface of said interlayer insulation film and said contact plug; and reacting oxygen radicals upon said TiAlN film.

11. The method as claimed in claim 9 , wherein said step of forming said layer containing nitrogen comprises the step of reacting NH radicals to a surface of said layer containing oxygen.

12. The method as claimed in claim 9 , wherein said step of forming said layer containing nitrogen comprises the step of reacting nitrogen radicals and hydrogen radicals to a surface of said layer containing oxygen.

13. The method as claimed in claim 9 , wherein said step of forming said self-alignment film is conducted at a temperature of 300° C. or less.

14. The method as claimed in claim 9 , wherein said step of forming said self-alignment film comprises the step of depositing a Ti film by a sputtering process.

15. A method of fabricating a semiconductor device having a function film, comprising the steps of:

forming an interlayer insulation film over a semiconductor substrate over which a transistor is formed so as to cover said transistor;

forming a conductive plug in said interlayer insulation film in contact with a diffusion region of said transistor; and

forming a functional film over said conductive plug,

wherein there is provided, after said step of forming said conductive plug but before said step of forming said functional film, the steps of: forming a layer containing aluminum and oxygen on said interlayer insulation film and a surface of said conductive plug; forming a layer containing nitrogen on a surface of said layer containing aluminum and oxygen; and forming a self-alignment film over said layer containing nitrogen.

Assignments (4)
CHANGE OF ADDRESS Recorded Dec 23, 2016
From: FUJITSU SEMICONDUCTOR LIMITED
To: FUJITSU SEMICONDUCTOR LIMITED
Reel/Frame 041188/0401 →
CHANGE OF NAME Recorded Jul 9, 2010
From: FUJITSU MICROELECTRONICS LIMITED
To: FUJITSU SEMICONDUCTOR LIMITED
Reel/Frame 024651/0744 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 9, 2008
From: FUJITSU LIMITED
To: FUJITSU MICROELECTRONICS LIMITED
Reel/Frame 021976/0089 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 6, 2008
From: SASHIDA, NAOYA
To: FUJITSU LIMITED
Reel/Frame 020608/0756 →