IP Library Granted Patent US 7,573,332
Granted Patent B1
US 7,573,332 · App. 12/039,377 · Granted Aug 11, 2009

Amplifier with active inductor

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Quick Facts
Patent No.
US 7,573,332
App. No.
12/039,377
Granted
Aug 11, 2009
Kind
B1
Abstract

An amplifier comprises an amplifier stage and an active inductor. The amplifier stage has an input terminal and an output terminal. The active inductor comprises first and second resistors and first and second transistors. The first resistor has a first terminal coupled to the output terminal of the amplifier stage, and a second terminal. The second resistor has a first terminal coupled to the output terminal of the amplifier stage, and a second terminal. The first transistor has a first current electrode coupled to the second terminal of the first resistor, a control electrode coupled to receive a bias voltage, and a second current electrode. The second transistor has a first current electrode coupled to the second current electrode of the first transistor, a control electrode coupled to the second terminal of the second resistor, and a second current electrode coupled to a first power supply voltage terminal.

Claims (64)

1. An amplifier comprising:

an amplifier stage having an input terminal and an output terminal; and

an active inductor comprising:

a first resistor having a first terminal coupled to the output terminal of the amplifier stage, and a second terminal;

a second resistor having a first terminal coupled to the output terminal of the amplifier stage, and a second terminal;

a first transistor having a first current electrode coupled to the second terminal of the first resistor, a control electrode coupled to receive a bias voltage, and a second current electrode; and

a second transistor having a first current electrode coupled to the second current electrode of the first transistor, a control electrode coupled to the second terminal of the second resistor, and a second current electrode coupled to a first power supply voltage terminal.

2. The amplifier of claim 1 , wherein a transconductance of the first transistor is substantially equal to a transconductance of the second transistor.

3. The amplifier of claim 2 , wherein the transconductance of the first and second transistors is at least partially determined by a transistor channel width to length ratio of the first and second transistors.

4. The amplifier of claim 1 , wherein a voltage gain of the active inductor is substantially independent of a transconductance of the first and second transistors.

5. The amplifier of claim 1 , wherein the first and second resistors are implemented using polysilicon on an integrated circuit.

6. The amplifier of claim 1 , wherein a first resistance value of the first resistor at least partially determines a first voltage gain of the amplifier for a first predetermined frequency, and a second resistance value of the second resistor at least partially determines a second voltage gain of the amplifier for a second predetermined frequency, wherein the second predetermined frequency is higher than the first predetermined frequency.

7. The amplifier of claim 1 , wherein the amplifier stage comprises:

a third resistor having a first terminal coupled to a second power supply voltage terminal, and a second terminal coupled to the output terminal of the amplifier stage; and

a third transistor having a first current electrode coupled to the second terminal of the third resistor, a control electrode for receiving an input signal, and a second current electrode coupled to the first power supply voltage terminal.

8. The amplifier of claim 7 , wherein the amplifier stage further comprises:

a fourth resistor having a first terminal coupled to the second power supply voltage terminal, and a second terminal; and

a fourth transistor having a first current electrode coupled to second terminal of the fourth resistor, a control electrode for receiving a second input signal, and a second current electrode coupled to the first power supply voltage terminal.

9. The amplifier of claim 8 , wherein the active inductor further comprises:

a fifth resistor having a first terminal coupled to the second power supply voltage terminal, and a second terminal coupled to the first current electrode of the first transistor;

a sixth resistor having a first terminal coupled to the second power supply voltage terminal, and a second terminal;

a seventh resistor having a first terminal coupled to the second terminal of the sixth resistor, and a second terminal coupled to the second terminal of the fourth resistor;

an eighth resistor having a first terminal coupled to the second terminal of the fourth resistor, and a second terminal;

a fifth transistor having a first current electrode coupled to the second terminal of the sixth resistor, a control electrode coupled to the second power supply voltage terminal, and a second current electrode; and

a sixth transistor having a first current electrode coupled to the second current electrode of the fifth transistor, a control electrode coupled to the second terminal of the eighth resistor, and a second current electrode coupled to the first power supply voltage terminal.

10. The amplifier of claim 1 , wherein the first and second transistors are characterized as being metal-oxide semiconductor (MOS) transistors and an inductor value of the active inductor is substantially equal to a gate-to-source parasitic capacitance of the second transistor multiplied by a resistance value of the second resistor.

11. The amplifier of claim 1 , wherein the input terminal is for receiving a low voltage digital signal (LVDS) from a radio frequency front-end of a cellular handset.

12. An amplifier comprising:

an amplifier stage having an input terminal and an output terminal, the amplifier stage comprising:

a first resistor having a first terminal coupled to a first power supply voltage terminal, and a second terminal coupled to the output terminal of the amplifier stage; and

a first transistor having a first current electrode coupled to the second terminal of the first resistor, a control electrode for receiving an input signal, and a second current electrode coupled to a second power supply voltage terminal; and

an active inductor comprising:

a second resistor having a first terminal coupled to the output terminal of the amplifier stage, and a second terminal;

a third resistor having a first terminal coupled to the output terminal of the amplifier stage, and a second terminal;

a second transistor having a first current electrode coupled to the second terminal of the second resistor, a control electrode coupled to receive a bias voltage, and a second current electrode; and

a third transistor having a first current electrode coupled to the second current electrode of the second transistor, a control electrode coupled to the second terminal of the third resistor, and a second current electrode coupled to the second power supply voltage terminal.

13. The amplifier of claim 12 , wherein the bias voltage is equal to a power supply voltage provided to the first power supply voltage terminal.

14. The amplifier of claim 12 , wherein a transconductance of the second and third transistors is at least partially determined by a transistor channel width to length ratio of the second and third transistors.

15. The amplifier of claim 12 , wherein a voltage gain of the active inductor is substantially independent of a transconductance of the second and third transistors.

16. The amplifier of claim 12 , wherein a first resistance value of the second resistor at least partially determines a first voltage gain of the amplifier for a first predetermined frequency, and a second resistance value of the third resistor at least partially determines a second voltage gain of the amplifier for a second predetermined frequency, wherein the second predetermined frequency is higher than the first predetermined frequency.

17. The amplifier of claim 12 , wherein the amplifier stage is a differential amplifier further comprising:

a fourth resistor having a first terminal coupled to the first power supply voltage terminal, and a second terminal for providing a second output terminal of the amplifier stage; and

a fourth transistor having a first current electrode coupled to the second terminal of the fourth resistor, a control electrode for receiving a second input signal, and a second current electrode coupled to the second power supply voltage terminal.

18. An amplifier comprising:

an amplifier stage having an input terminal and an output terminal, the amplifier stage comprising:

a first resistor having a first terminal coupled to a first power supply voltage terminal, and a second terminal coupled to the output terminal of the amplifier stage;

a first transistor having a first current electrode coupled to the second terminal of the first resistor, a control electrode for receiving an input signal, and a second current electrode; and

a first current source having a first terminal coupled to the second current electrode of the first transistor and a second terminal coupled to a second power supply voltage terminal; and

an active inductor comprising:

a second resistor having a first terminal coupled to the first power supply voltage terminal, and a second terminal;

a third resistor having a first terminal coupled to the output terminal of the amplifier stage, and a second terminal coupled to the second terminal of the second resistor;

a fourth resistor having a first terminal coupled to the output terminal of the amplifier stage, and a second terminal;

a second transistor having a first current electrode coupled to the second terminal of the second and third resistors, a control electrode coupled to receive a bias voltage, and a second current electrode;

a third transistor having a first current electrode coupled to the second current electrode of the second transistor, a control electrode coupled to the second terminal of the fourth resistor, and a second current electrode; and

a second current source having a first terminal coupled to the second current electrode of the third transistor, and a second terminal coupled to the second power supply voltage terminal.

19. The amplifier of claim 18 , further comprising:

a fifth resistor having a first terminal coupled to the first power supply voltage terminal, and a second terminal for providing a second output terminal of the amplifier stage;

a fourth transistor having a first current electrode coupled to the second terminal of the fifth resistor, a control electrode for receiving a second input signal, and a second current electrode coupled to the first terminal of the first current source;

a sixth resistor having a first terminal coupled to the first power supply voltage terminal, and a second terminal;

a seventh resistor having a first terminal coupled to the second terminal of the sixth resistor, and a second terminal coupled to the second output terminal of the amplifier stage;

an eighth resistor having a first terminal coupled to the second terminal of the seventh resistor, and a second terminal;

a fifth transistor having a first current electrode coupled to the second terminal of the sixth resistor, a control electrode coupled to receive the bias voltage, and a second current electrode; and

a sixth transistor having a first current electrode coupled to the second current electrode of the fifth transistor, a control electrode coupled to the second terminal of the eighth resistor, and a second current electrode coupled to the first terminal of the second current source.

20. The amplifier of claim 19 , wherein the input signal and the second input signal are together characterized as being a differential low voltage digital signal (LVDS) from a radio frequency (RF) front-end of a cellular handset.

Assignments (20)
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040925 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Feb 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V. F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 052917/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040928 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Jan 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 052915/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 037486 FRAME 0517. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Dec 10, 2019
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CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE PATENTS 8108266 AND 8062324 AND REPLACE THEM WITH 6108266 AND 8060324 PREVIOUSLY RECORDED ON REEL 037518 FRAME 0292. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Feb 1, 2017
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RELEASE OF SECURITY INTEREST Recorded Nov 7, 2016
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PATENT RELEASE Recorded Dec 21, 2015
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