Semiconductor device having improved heat sink

1. A semiconductor device, comprising:

a substrate;

a first semiconductor element provided on said substrate;

a second semiconductor element provided on said substrate, said second semiconductor element having a maximum power consumption that is smaller than a maximum power consumption of said first semiconductor element;

a first heat sink fixed to said first semiconductor element; and

a second heat sink fixed to said second semiconductor element,

wherein said first heat sink is disposed within an opening of said second heat sink and is spaced apart from said second heat sink.

2. The semiconductor device as set forth in claim 1 , wherein a gap is included between said first semiconductor element and said second semiconductor element.

3. The semiconductor device as set forth in claim 1 , wherein said first semiconductor element and said second semiconductor element have underfill resins filling within gaps with said substrate, respectively, and wherein surfaces of said underfill resins disposed between said first semiconductor element and said second semiconductor element are exposed to the outside thereof.

4. The semiconductor device as set forth in claim 1 , wherein a height of an upper surface of said first semiconductor element from said substrate is lower than a height of an upper surface of said second semiconductor element from said substrate.

5. The semiconductor device as set forth in claim 4 , wherein a thickness of said first heat sink is different from a thickness of said second heat sink.

6. The semiconductor device as set forth in claim 5 , wherein a height of the upper surface of said first heat sink from said substrate is the same as a height of the upper surface of said second heat sink from said substrate.

7. The semiconductor device as set forth in claim 1 , wherein said first semiconductor element functions as a logic circuit and said second semiconductor element functions as a memory circuit.

8. The semiconductor device as set forth in claim 7 , wherein said first semiconductor element is a bare chip, and said second semiconductor element is packaged.

9. The semiconductor device as set forth in claim 1 , wherein said first semiconductor element is a bare chip, and said second semiconductor element is packaged.

10. The semiconductor device as set forth in claim 1 , wherein said the first and said second heat sinks are flat-shaped.

11. The semiconductor device as set forth in claim 1 , wherein said first heat sink or said second heat sink has an end portion, which is bent toward said substrate, and is connected to said substrate at said end portion.

12. The semiconductor device as set forth in claim 11 , wherein said end portion, which is bent toward said substrate, is disposed in a position, which is closer to a circumference of said substrate than said first semiconductor element and said second semiconductor element.

13. The semiconductor device as set forth in claim 1 , wherein a plurality of said second semiconductor elements are provided on said substrate, and said second heat sink totally covers said plurality of said second semiconductor elements.

14. The semiconductor device as set forth in claim 1 , wherein a dimensional area of said opening is larger than a dimensional area of said first semiconductor element.

15. The semiconductor device as set forth in claim 14 , wherein said opening is disposed within a central region of said second heat sink.

16. A semiconductor device, comprising:

a substrate;

a first semiconductor element provided on said substrate;

a plurality of second semiconductor elements provided on said substrate, each of said second semiconductor element having a maximum power consumption that is smaller than a maximum power consumption of said first semiconductor element;

a first heat sink fixed to said first semiconductor element; and

a second heat sink commonly fixed to each of said second semiconductor elements,

wherein said first heat sink is spaced apart from said second heat sink.

17. The semiconductor device as set forth in claim 16 , wherein said second heat sink includes an opening and said first heat sink is arranged in said opening.

18. The semiconductor device as set forth in claim 17 , wherein a dimensional area of said opening is larger than a dimensional area of said first semiconductor element.

19. The semiconductor device as set forth in claim 17 , wherein said opening is disposed within a central region of said second heat sink.

20. The semiconductor device as set forth in claim 16 , wherein said first semiconductor element and said plurality of second semiconductor elements are disposed on a same side of said substrate.