IP Library Granted Patent US 8,386,695
Granted Patent B2
US 8,386,695 · App. 12/042,070 · Granted Feb 26, 2013

Methods and apparatus for writing data to non-volatile memory

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Quick Facts
Patent No.
US 8,386,695
App. No.
12/042,070
Granted
Feb 26, 2013
Kind
B2
Abstract

Methods and apparatus for writing data to non-volatile memory include maintaining one or more lists of obsolete blocks of the non-volatile memory and limiting the lists to a predetermined value. If a write operation would result in a list exceeding its predetermined value, a block erase operation is performed on one of the obsolete blocks. Valid data contained in an obsolete block selected for erasure is relocated prior to erasure.

Claims (55)

1. A memory system comprising:

a non-volatile memory arranged in blocks, each block containing a plurality of sectors of memory cell locations; and

a controller coupled to the non-volatile memory, the controller configured to permit a maximum number of obsolete blocks for each of one or more write pointers used to define physical locations for writing data received from an external device, and in response to a write operation that would result in a number of obsolete blocks exceeding the maximum number for one of the one or more write pointers, performing a block erase operation on one of a plurality of existing obsolete blocks of the one of the one or more write pointers;

wherein the maximum number of obsolete blocks for the one of the one or more write pointers is two or more blocks.

2. The memory system of claim 1 , wherein the controller is further configured to select the existing obsolete block that has the lesser number of valid sectors of data for the block erase operation.

3. The memory system of claim 1 , wherein the controller is further configured to select the oldest of the plurality of existing obsolete blocks for the block erase operation.

4. The memory system of claim 3 , wherein the controller is further configured to select a different existing obsolete block for the block erase operation if the originally selected obsolete block includes a write pointer.

5. The memory system of claim 1 , wherein the controller is further configured to relocate valid sectors of data from the existing obsolete block selected for the block erase operation prior to performing the block erase operation.

6. The memory system of claim 1 , further comprising a volatile memory coupled to the controller.

7. The memory system of claim 6 , wherein the controller is further configured to maintain, in the volatile memory, a list of addresses of blocks of the non-volatile memory upon which a block erase operation has been performed.

8. The memory system of claim 7 , wherein the list of addresses of blocks of the non-volatile memory upon which a block erase operation has been performed is limited to a maximum number of erased blocks regardless of a total number of erased blocks.

9. The memory system of claim 7 , wherein an order of the list of addresses corresponds to an order in which the blocks were erased.

10. The memory system of claim 6 , wherein the controller is further configured to maintain, in the volatile memory, a list of addresses of erased blocks currently available for assignment to a write pointer or for rewriting a control structure of the non-volatile memory device.

11. The memory system of claim 10 , wherein the list of addresses of erased blocks currently available for assignment is limited to a maximum number of erased blocks regardless of a total number of erased blocks.

12. A memory system comprising:

a non-volatile memory arranged in blocks, each block containing a plurality of sectors of memory cell locations; and

a controller coupled to the non-volatile memory, the controller configured to permit a maximum number of obsolete blocks for each of one or more write pointers used to define physical locations for writing data received from an external device, and in response to a write operation that would result in a number of obsolete blocks exceeding the maximum number for one of the one or more write pointers, performing a block erase operation on one of a plurality of existing obsolete blocks of the one of the one or more write pointers;

wherein the maximum number of obsolete blocks is two blocks for each write pointer.

13. A memory system comprising:

a non-volatile memory arranged in blocks, each block containing a plurality of sectors of memory cell locations;

a controller coupled to the non-volatile memory, the controller configured to permit a maximum number of obsolete blocks for one or more write pointers used to define physical locations for writing data received from an external device, and in response to a write operation that would result in a number of obsolete blocks exceeding the maximum number, performing a block erase operation on one of the existing obsolete blocks; and

a volatile memory coupled to the controller;

wherein the controller is further configured to maintain, in the volatile memory, a list of addresses of blocks of the non-volatile memory upon which a block erase operation has been performed;

wherein the list of addresses of blocks of the non-volatile memory upon which a block erase operation has been performed is limited to a maximum number of erased blocks regardless of a total number of erased blocks; and

wherein the controller is further configured to transfer the list of addresses of blocks of the non-volatile memory upon which a block erase operation has been performed to the non-volatile memory in response to the list containing its maximum number of erased blocks.

14. A memory system comprising:

a non-volatile memory arranged in blocks, each block containing a plurality of sectors of memory cell locations;

a controller coupled to the non-volatile memory, the controller configured to permit a maximum number of obsolete blocks for one or more write pointers used to define physical locations for writing data received from an external device, and in response to a write operation that would result in a number of obsolete blocks exceeding the maximum number, performing a block erase operation on one of the existing obsolete blocks; and

a volatile memory coupled to the controller;

wherein the controller is further configured to maintain, in the volatile memory, a list of addresses of erased blocks currently available for assignment to a write pointer or for rewriting a control structure of the non-volatile memory device

wherein the list of addresses of erased blocks currently available for assignment is limited to a maximum number of erased blocks regardless of a total number of erased blocks; and

wherein the controller is further configured to transfer the list of addresses of erased blocks currently available for assignment to the non-volatile memory in response to the list containing the maximum number of erased blocks.

15. A method of operating a memory system, comprising:

maintaining a list, in a volatile memory, of obsolete blocks of a non-volatile memory;

in response to receiving a write operation for a data sector to the non-volatile memory, determining whether the list of obsolete blocks of memory locations contains a number of block addresses equal to a predetermined value;

if the number of block addresses is equal to the predetermined value, selecting one of the blocks in the list of obsolete blocks for erasure;

determining if the block selected for erasure contains valid data and relocating any valid data to another block of memory locations;

erasing the selected block after relocating any valid data; and

adding an address of the selected block to a list of erased blocks maintained in the volatile memory.

16. The method of claim 15 , wherein maintaining a list of obsolete blocks comprises maintaining a list of obsolete blocks associated with each write pointer used by a write operation for data received from an external device.

17. The method of claim 16 , wherein maintaining a list of obsolete blocks associated with each write pointer used by the write operation for data received from an external device further comprises limiting each list to a number of addresses equal to the predetermined value.

18. The method of claim 17 , wherein limiting each list to a number of addresses equal to the predetermined value comprises limiting each list to two addresses.

19. The method of claim 16 , wherein selecting one of the blocks in the list of obsolete blocks for erasure comprises selecting an existing obsolete block of the write pointer associated with the write operation having the lesser number of valid sectors of data for erasure.

20. The method of claim 19 , further comprising selecting a different existing obsolete block if the originally selected obsolete block includes a write pointer.

21. The method of claim 16 , wherein selecting, one of the blocks in the list of obsolete blocks for erasure comprises selecting an oldest obsolete block of the write pointer associated with the write operation for erasure.

22. A method of operating a memory system, comprising:

maintaining a list, in a volatile memory, of obsolete blocks of a non-volatile memory;

in response to receiving a write operation for a data sector to the non-volatile memory, determining whether the list of obsolete blocks of memory locations contains a number of addresses equal to a predetermined value;

if the number of addresses is equal to the predetermined value, selecting one of the blocks in the list of obsolete blocks for erasure;

determining if the block selected for erasure contains valid data and relocating any valid data to another block of memory locations;

erasing the selected block after relocating any valid data;

adding an address of the selected block to a list of erased blocks maintained in the volatile memory;

determining if the list of erased blocks maintained in the volatile memory contains a number of addresses equal to a second predetermined value;

transferring the list to the non-volatile memory if the list contains a number of addresses equal to the second predetermined value; and

clearing the list after transfer to the non-volatile memory.

Assignments (7)
RELEASE OF SECURITY INTEREST Recorded Nov 12, 2019
From: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
Reel/Frame 051028/0001 →
RELEASE OF SECURITY INTEREST Recorded Oct 9, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 050937/0001 →
RELEASE OF SECURITY INTEREST Recorded Aug 23, 2018
From: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 047243/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REPLACE ERRONEOUSLY FILED PATENT #7358718 WITH THE CORRECT PATENT #7358178 PREVIOUSLY RECORDED ON REEL 038669 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTEREST. Recorded Jun 8, 2017
From: MICRON TECHNOLOGY, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 043079/0001 →
PATENT SECURITY AGREEMENT Recorded Jun 2, 2016
From: MICRON TECHNOLOGY, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
Reel/Frame 038954/0001 →
SECURITY INTEREST Recorded May 12, 2016
From: MICRON TECHNOLOGY, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 038669/0001 →
MERGER Recorded Mar 25, 2011
From: LEXAR MEDIA, INC.
To: MICRON TECHNOLOGY, INC.
Reel/Frame 026024/0131 →