IP Library Granted Patent US 8,017,511
Granted Patent B2
US 8,017,511 · App. 12/045,438 · Granted Sep 13, 2011

Method of manufacturing semiconductor device

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Quick Facts
Patent No.
US 8,017,511
App. No.
12/045,438
Granted
Sep 13, 2011
Kind
B2
Abstract

Etching is performed on an insulating layer 23 and a conductive layer 32 with a photoresist 41 as the mask, to form an opening 51 in the conductive layer 32 . After removing the photoresist 41 , another insulating layer 24 is formed all over, which is etched back so as to expose a surface of a conductive layer 31 , to thereby cover the inner wall of the opening 51 . Then etching is performed on the conductive layer 31 with the latter insulating layer 24 as the mask, so as to form another opening 52 in the conductive layer 31 . Then still another insulating layer 25 is formed all over, which is then etched back so as to expose a surface of the conductive layer 32 , to thereby fill the opening 52 with the last formed insulating layer 25.

Claims (23)

1. A method of manufacturing a semiconductor device, comprising:

forming a first layer over a semiconductor substrate;

forming a second layer over said first layer;

forming a third layer over said second layer;

forming in said third layer an opening having an inner surface;

forming a first sidewall having one side surface thereof adjacent to said inner surface;

forming a first line space in said first layer at a position defined by said first side wall;

forming a second sidewall abutting another side surface of said first sidewall;

forming a second line space in said first layer at a position defined by said second side wall.

2. The method of claim 1 , further comprising filling said first line space and a space defined by said first sidewall with an insulating material, and filling said second line space and a space defined by said second sidewall with said insulating material,

wherein said first sidewall and said second sidewall are formed of said insulating material.

3. The method of claim 1 , wherein said second line space is formed after said first line space is formed.

4. A method of manufacturing a semiconductor device, comprising:

forming a first layer constituted of a conductive film over a semiconductor substrate, a second layer over said first layer, and a third layer over said second layer;

forming a inner edge in said third layer;

forming a first sidewall having a first edge thereof touching said inner edge;

forming a second sidewall having a second edge thereof touching said first edge;

determining a line width of said first layer by using said first and second side walls.

5. The method of claim 4 , wherein said first inner edge defines an opening in said third layer.

6. The method of claim 4 , further comprising removing said third layer after forming said first sidewall and before forming said second sidewall.

7. The method of claim 4 , further comprising forming a first line space in said first layer defined by a third edge of said first sidewall, said third edge opposed to said first edge of said first sidewall.

8. The method of claim 7 , further comprising forming a second line space in said first layer defined by a fourth edge of said second sidewall, said fourth edge being opposed to said second edge of said second sidewall.

9. The method of claim 8 , wherein said second line space is formed after said first line space is formed.

Assignments (1)
CHANGE OF NAME Recorded Nov 2, 2010
From: NEC ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 025235/0423 →