Semiconductor device with a high-frequency interconnect
View Patent ↗Provided is a semiconductor device having a high-frequency interconnect, first dummy conductor patterns, an interconnect, and second dummy conductor patterns. The first dummy conductor patterns are arranged in the vicinity of the high-frequency interconnect, and the second dummy conductor patterns are arranged in the vicinity of the interconnect. The minimum value of distance between the high-frequency interconnect and the first dummy conductor patterns is larger than the minimum value of distance between the interconnect and the second dummy conductor patterns.
1. A semiconductor device having an interconnect layer comprising:
a first interconnect configured to conduct an electric current with a high-frequency;
first dummy conductor patterns provided in a same layer as said first interconnect, said first dummy conductor patterns being arranged in the vicinity of said first interconnect;
a second interconnect provided in the same layer as said first interconnect; and
second dummy conductor patterns provided in the same layer as said first interconnect, said second dummy conductor patterns being arranged in a vicinity of said second interconnect,
wherein, in a plan view, a minimum value of distance between said first interconnect and said first dummy conductor patterns is larger than a minimum value of distance between said second interconnect and said second dummy conductor patterns.
2. The semiconductor device as claimed in claim 1 ,
wherein said first interconnect is an interconnect configured to conduct an electric current with a frequency of at least 5 GHz therethrough.
3. The semiconductor device as claimed in claim 1 ,
wherein said first dummy conductor patterns are provided on both sides of said first interconnect, and
wherein said second dummy conductor patterns are provided on both sides of said second interconnect.
4. The semiconductor device as claimed in claim 1 ,
wherein said first interconnect is configured to function as an inductor.
5. The semiconductor device as claimed in claim 4 ,
wherein said first interconnect has a coil form, and said first dummy conductor patterns are provided on both of an inside and an outside of a region surrounded by said first interconnect.
6. The semiconductor device as claimed in claim 5 ,
wherein said second dummy conductor patterns are provided on both sides of said second interconnect.
7. A semiconductor device, comprising:
a first interconnect as a high-frequency interconnect;
first dummy conductor patterns arranged in a vicinity of said first interconnect;
a second interconnect; and
second dummy conductor patterns arranged in a vicinity of said second interconnect,
wherein a minimum value of distance between said first interconnect and said first dummy conductor patterns is larger than a minimum value of distance between said second interconnect and said second dummy conductor patterns,
wherein said first dummy conductor patterns are provided on two sides of said first interconnect, and
wherein said second dummy conductor patterns are provided on two sides of said second interconnect.
8. The semiconductor device as claimed in claim 7 ,
wherein a minimum value of distance between said first interconnect and said first dummy conductor pattern is at least twice as large as a minimum value of distance between said second interconnect and said second dummy conductor patterns.
9. The semiconductor device as claimed in claim 7 ,
wherein said first interconnect is an interconnect configured to allow an electric current having a frequency of at least 5 GHz to flow therethrough.
10. The semiconductor device as claimed in claim 7 ,
wherein said first interconnect is configured to function as an inductor.
11. The semiconductor device as claimed in claim 10 ,
wherein said first interconnect has a coil form, and
wherein said first dummy conductor patterns are provided on both of an inside and an outside of a region surrounded by said first interconnect.
12. A semiconductor device, comprising:
a first interconnect configured to conduct an electric current with a high-frequency;
first dummy conductor patterns arranged in a vicinity of said first interconnect;
a second interconnect; and
second dummy conductor patterns arranged in a vicinity of said second interconnect,
wherein a minimum value of distance between said first interconnect and said first dummy conductor patterns is larger than a minimum value of distance between said second interconnect and said second dummy conductor patterns,
wherein said first interconnect is configured to function as an inductor,
wherein said first interconnect has a coil form, and
wherein said first dummy conductor patterns are provided on both of an inside and an outside of a region surrounded by said first interconnect.