IP Library Granted Patent US 8,125,789
Granted Patent B2
US 8,125,789 · App. 12/046,893 · Granted Feb 28, 2012

Wiring substrate and electronic device

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 8,125,789
App. No.
12/046,893
Granted
Feb 28, 2012
Kind
B2
Abstract

A wiring substrate includes a plurality of electrode terminals, to which external connection terminals of an electronic component are coupled, arranged in a row on one principal surface thereof, wherein the electrode terminals each include: a first linear portion; a second linear portion extending from an end of the first linear portion in a direction different from a direction of the first linear portion; and a bent portion that is a part where the first linear portion and the second linear portion are connected.

Claims (33)

1. A wiring substrate comprising

a plurality of electrode terminals, to which external connection terminals of an electronic component are coupled, arranged in a row on one principal surface thereof,

wherein the electrode terminals each include:

a first linear portion which has a certain width;

a second linear portion which has a certain width, the second linear portion extending from an end of the first linear portion in a direction different from a direction of the first linear portion; and

a bent portion that is a part where the first linear portion and the second linear portion are connected;

wherein the first linear portion, the second linear portion and the bend portion are formed on the one principle surface.

2. The wiring substrate according to claim 1 , wherein the first linear portions of the plurality of electrode terminals are arranged in parallel to each other.

3. The wiring substrate according to claim 1 , wherein the second linear portions of the plurality of electrode terminals are arranged in parallel to each other.

4. The wiring substrate according to claim 1 , wherein the bent portions of the plurality of electrode terminals are arranged in a row.

5. The wiring substrate according to claim 4 , wherein:

a plurality of the rows formed by the plurality of electrode terminals on the principal surface are formed in parallel to each other; and

the bent portions of the electrode terminals constituting one of the rows and the bent portions of the electrode terminals constituting another of the rows are shifted from each other in a direction of the rows being formed.

6. The wiring substrate according to claim 1 , wherein the plurality of electrode terminals have the bent portions arranged in a plurality of rows, and the plurality of rows are in parallel to each other.

7. The wiring substrate according to claim 1 , wherein the plurality of electrode terminals have the bent portions at both ends of the respective first linear portions.

8. The wiring substrate according to claim 7 , wherein the bent portions arranged at one of the ends of the first linear portions, and the bent portions arranged at the other of the ends of the first linear portions are aligned in a direction perpendicular to a direction of the electrode terminals being arranged.

9. The wiring substrate according to claim 7 , wherein the bent portions arranged at one of the ends of the first linear portions, and the bent portions arranged at the other of the ends of the first linear portions are shifted from each other in a direction of the electrode terminals being arranged.

10. The wiring substrate according to claim 1 , wherein each of the second linear portions extends from an end of a corresponding one of the first linear portions at an acute angle relative to the corresponding first linear portion.

11. An electronic device comprising:

a wiring substrate including a plurality of electrode terminals arranged in a row on one principal surface thereof; and

an electronic component mounted on the plurality of electrode terminals via a conductive member, wherein:

the electrode terminals each includes

a first linear portion which has a certain width,

a second linear portion which has a certain width, the second linear portion extending from an end of the first linear portion in a direction different from a direction of the first linear portion, and

a bent portion that is a part where the first linear portion and the second linear portion are connected;

wherein the first linear portion, the second linear portion and the bend portion are formed on the one principle surface; and

external connection terminals of the electronic component are coupled to the bent portions of the electrode terminals via the conductive member.

12. The electronic device according to claim 11 , wherein the external connection terminals of the electronic component each have a protruded portion.

13. The electronic device according to claim 11 , wherein the external connection terminals of the electronic component are coupled to the electrode terminals on the wiring substrate, the external connection terminals of the electronic component forming a plurality of rows that are in parallel to each other.

14. The electronic device according to claim 11 , wherein:

the bent portions of the electrode terminals on the wiring substrate are arranged so that the bent portions conform to the configuration of the external connection terminals of the electronic component; and

the external connection terminals of the electronic component are coupled to the bent portions of the electrode terminals via the conductive member.

15. The electronic device according to claim 11 , wherein the conductive member includes a material containing solder.

Assignments (4)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 27, 2015
From: FUJITSU SEMICONDUCTOR LIMITED
To: SOCIONEXT INC.
Reel/Frame 035508/0637 →
CHANGE OF NAME Recorded Jul 9, 2010
From: FUJITSU MICROELECTRONICS LIMITED
To: FUJITSU SEMICONDUCTOR LIMITED
Reel/Frame 024651/0744 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 9, 2008
From: FUJITSU LIMITED
To: FUJITSU MICROELECTRONICS LIMITED
Reel/Frame 021976/0089 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 3, 2008
From: NISHIMURA, TAKAO
To: FUJITSU LIMITED
Reel/Frame 020752/0062 →