Method of placing wires

1. A computer implemented method of placing a shield wire with respect to a shield subject wire placed on a chip, a method comprising using a computer:

setting a plurality of wire tracks on the chip;

dividing the chip into at least a first area and a second area according to a division boundary;

placing a first dummy terminal in contact with the division boundary in the first area on a wire track adjacent to the shield subject wire among the plurality of wire tracks;

placing a second dummy terminal in contact with the division boundary in the second area on a wire track adjacent to the shield subject wire;

placing a first shield wire connected to the first dummy terminal on a wire track adjacent to the shield subject wire in the first area; and

placing a second shield wire connected to the second dummy terminal on a wire track adjacent to the shield subject wire in the second area,

wherein a placement of the first shield wire and a placement of the second shield wire are performed in parallel by different CPUs(Central Processing Units).

2. The method of placing wires according to claim 1 wherein the dummy terminal is set to same wire layer as the shield wire.

3. The method of placing wires according to claim 2 wherein a placement of the first shield wire and a placement of the second shield wire are performed in parallel.

4. The method of placing wires according to claim 1 wherein a placement of the dummy terminal is performed based on an attribute of the shield wire with respect to the shield subject wire.

5. The method of placing wires according to claim 2 wherein a placement of the dummy terminal is performed based on an attribute of the shield wire with respect to the shield subject wire.

6. The method of placing wires according to claim 1 wherein a placement of the dummy terminal is performed based on an attribute of the shield wire with respect to the shield subject wire.

7. The method of placing wires according to claim 1 further comprising:

confirming whether the shield subject wire exists around a division boundary in an area when the division boundary is not laid on top of a wire track; and

determining whether to place the shield wire on a wire track adjacent to the division boundary in an adjacent area based on the confirming.

8. The method of placing wires according to claim 2 further comprising:

confirming whether the shield subject wire exists around a division boundary in an area when the division boundary is not laid on top of a wire track; and

determining whether to place the shield wire on a wire track adjacent to the division boundary in an adjacent area based on the confirming.

9. The method of placing wires according to claim 1 further comprising:

confirming whether the shield subject wire exists around a division boundary in an area when the division boundary is not laid on top of a wire track; and

determining whether to place the shield wire on a wire track adjacent to the division boundary in an adjacent area based on the confirming.

10. The method of placing wires according to claim 4 further comprising:

confirming whether the shield subject wire exists around a division boundary in an area when the division boundary is not laid on top of a wire track; and

determining whether to place the shield wire on a wire track adjacent to the division boundary in an adjacent area based on the confirming.

11. The method of placing wires according to claim 1 wherein a placement of the first shield wire and a placement of the second shield wire are performed in parallel, and a shield wire on the chip is determined by combining data of a shield wire placed in the first area and data of a shield wire placed in the second area.

12. The method of placing wires according to claim 2 wherein a placement of the first shield wire and a placement of the second shield wire are performed in parallel, and a shield wire on the chip is determined by combining data of a shield wire placed in the first area and data of a shield wire placed in the second area.

13. The method of placing wires according to claim 1 wherein a placement of the first shield wire and a placement of the second shield wire are performed in parallel, and a shield wire on the chip is determined by combining data of a shield wire placed in the first area and data of a shield wire placed in the second area.

14. The method of placing wires according to claim 4 wherein a placement of the first shield wire and a placement of the second shield wire are performed in parallel, and a shield wire on the chip is determined by combining data of a shield wire placed in the first area and data of a shield wire placed in the second area.

15. The method of placing wires according to claim 7 wherein a placement of the first shield wire and a placement of the second shield wire are performed in parallel, and a shield wire on the chip is determined by combining data of a shield wire placed in the first area and data of a shield wire placed in the second area.

16. A computer implemented method of placing a shield wire with respect to a shield subject wire placed on a chip, comprising using a computer for:

setting a plurality of wire tracks on the chip;

dividing the chip into at least a first area and a second area according to a division boundary;

confirming whether the shield subject wire exists around the division boundary in the second area when the division boundary is not laid on top of the wire track and

determining whether to place the shield wire on a wire track adjacent to the division boundary in the first area based on the confirming

wherein the confirming and the determining with respect to the first area and the second area are performed in parallel by different CPUs(Central Processing Units).