SCHMITT TRIGGER HAVING VARIABLE HYSTERESIS AND METHOD THEREFOR

1 . A Schmitt trigger, comprising:

a first inverter having an input and an output;

a second inverter having an input coupled to the output of the first inverter and an output;

bias means for providing a first bias voltage on a first output terminal, wherein a magnitude of the bias voltage is selectable by a first input signal; and

a first transistor having a first current electrode coupled to a first power supply terminal, a control electrode coupled to the output of the second inverter, a second current electrode coupled to the output of the first inverter, and a body coupled to the first output terminal.

2 . The Schmitt trigger of claim 1 , wherein:

the first transistor has a first conductivity type;

the bias means is further characterized by being for providing a second bias voltage on a second output terminal; and

a magnitude of the second bias voltage is selectable by a second input signal;

further comprising a second transistor having a first current electrode coupled to a second power supply terminal, a control electrode coupled to the output of the second inverter, a second current electrode coupled to the output of the first inverter, and a body coupled to the second output terminal.

3 . The Schmitt trigger of claim 2 , wherein:

the first conductivity type is P type;

the second conductivity type is N type;

the first power supply terminal is a VDD terminal; and

the second power supply terminal is a ground terminal.

4 . The Schmitt trigger of claim 1 , wherein:

the first inverter comprises a second transistor having a first current electrode coupled to the output of the first inverter, a control electrode coupled to the input of the first inverter, and a second current electrode;

further comprising a third transistor having a first current electrode coupled to the second current electrode of the second transistor, a second current electrode coupled to the first power supply terminal, and a control electrode coupled to the output of the first inverter;

wherein the second current electrode of the first transistor is coupled to the output of the first inverter through the second transistor.

5 . The Schmitt trigger of claim 4 , wherein the third transistor has a body coupled to the first output terminal.

6 . The Schmitt trigger of claim 4 , wherein:

the first inverter comprises a fourth transistor having a first current electrode coupled to the output of the first inverter, a control electrode coupled to the input of the first inverter, and a second current electrode;

further comprising a fifth transistor having a first current electrode coupled to the second current electrode of the fourth transistor, a second current electrode coupled to a second power supply terminal, and a control electrode coupled to the output of the first inverter.

7 . The Schmitt trigger of claim 6 , wherein:

the bias means is further characterized by being for providing a second bias voltage on a second output terminal; and

a magnitude of the bias voltage is selectable by a second input signal;

further comprising a sixth transistor having a first current electrode coupled to a second power supply terminal, a control electrode coupled to the output of the second inverter through the fourth transistor, a second current electrode coupled to the output of the first inverter, and a body coupled to the second output terminal.

8 . The Schmitt trigger of claim 7 , wherein:

the first transistor is P type;

the second transistor is P type;

the third transistor is P type;

the fourth transistor is N type;

the fifth transistor is N type; and

the sixth transistor is N type.

9 . The Schmitt trigger of claim 1 , wherein the first input signal comprises a plurality of bits.

10 . The Schmitt trigger of claim 1 , wherein hysteresis of the Schmitt trigger increases with an increase in magnitude of the first bias voltage.

11 . In a Schmitt trigger, a method comprising:

providing a first inverter having an input for receiving an input signal and having an output;

providing a first transistor between a first power supply terminal and the output of the first inverter;

selecting a threshold voltage for the first transistor;

applying the input signal at a first logic state to the input of the first inverter, wherein the first transistor becomes conductive at a first voltage;

transitioning the input signal from the first logic state to a second logic state, wherein the first transistor becomes non-conductive at a second voltage different from the first voltage.

12 . The method of claim 11 , wherein the step of selecting is further characterized by a first select signal selecting the threshold voltage of the first transistor.

13 . The method of claim 11 , further comprising;

changing the threshold voltage of the first transistor; and

transitioning the input signal from the first logic state to a second logic state, wherein the first transistor becomes non-conductive at a third voltage different from the first voltage and the second voltage.

14 . The method of claim 11 , further comprising:

providing a second transistor between a second power supply terminal and the output of the first inverter; and

selecting a threshold voltage for the second transistor;

wherein the step of applying the input signal at a first logic state to the input of the first inverter causes the second transistor to become non-conductive;

15 . The method of claim 14 , further comprising:

changing the threshold voltage of the second transistor; and

transitioning the input signal from the second logic state to the first logic state to cause the first transistor to become conductive at a third voltage different from the first voltage and the second voltage;

16 . The method of claim 11 , further comprising changing hysteresis of the Schmitt trigger by changing the threshold voltage of the first transistor.

17 . A Schmitt trigger, comprising:

a first inverter having an input for receiving an input signal and having an output;

first current means for supplying a first current to the output during a first portion of a transition of the input signal from a first logic state to a second logic state; and

select means for altering a magnitude of the first current that is supplied to the first output during the first portion of the transition of the input signal from the first logic state to the second logic state.

18 . The Schmitt trigger of claim 17 , wherein the first current means comprises a first transistor having a threshold voltage that is selectable by the select means:

19 . The Schmitt trigger of claim 17 , wherein the first current means comprises:

bias means for providing a first bias voltage on a first output terminal, wherein a magnitude of the bias voltage is selectable by a first input signal; and

a first transistor having a first current electrode coupled to a first power supply terminal, a control electrode coupled to the output of the second inverter, a second current electrode coupled to the output of the first inverter, and a body coupled to the first output terminal.

20 . The Schmitt trigger of claim 19 , wherein:

the bias means provides a bias voltage to a body of the first transistor, and a magnitude of the bias voltage is selectable by a multiple bit select signal.