Non-linear data converter, encoder and decoder
According to an aspect of the present invention, there is provided a non-linear data converter including: first to fourth converters that each performs a respective converting process on an input bit string to output respective output bit string; a generator that generates a random number bit string; and a selector that selects any one of the output bit strings from the first to fourth converters based on the random number bit string. Each of the converting processes is equivalent to performing a first mask process, a non-linear conversion predetermined for an encoding or a decoding and a second mask process.
1. A non-linear data converter including a CPU and comprising:
a first converter that performs a first process on an input bit string to output a first output bit string, the first process equivalent to performing:
a mask process using a first mask,
a non-linear conversion predetermined for performing an encoding or a decoding, and
a mask process using a second mask;
a second converter that performs a second process on the input bit string to output a second output bit string, the second process equivalent to performing:
the mask process using the first mask,
the non-linear conversion, and
a mask process using an inverted second mask;
a third converter that performs a third process on the input bit string to output a third output bit string, the third process equivalent to performing:
a mask process using an inverted first mask,
the non-linear conversion, and
the mask process using the second mask;
a fourth converter that performs a fourth process on the input bit string to output a fourth output bit string, the fourth process equivalent to performing:
the mask process using the inverted first mask,
the non-linear conversion, and
the mask process using the inverted second mask;
a generator that generates a random number bit string; and
a selector that selects any one of the first to fourth output bit strings based on the random number bit string.
2. An encoder comprising:
a key scheduler that generates a j-th enlarged key from a secret key, j being an integer larger than 1and smaller than z, z being an integer larger than 2;
a random number generator that generates a j-th random number bit string;
a mask generator that generates a j-th first mask and a j-th second mask based on the j-th random number bit string, a predetermined first mask and a predetermined second mask;
a pre-processor that outputs a first bit string based on an input plaintext block;
the non-linear data converter of claim 1 as a j-th function calculator that performs an encoding calculation to a j-th bit string to output a (j+1)-th bit string; and
a post-processor that outputs a ciphertext block based on a (Z+1)-th bit string.
3. A decoder comprising:
a key scheduler that generates a j-th enlarged key from a secret key, j being an integer larger than 1 and smaller than z, z being an integer larger than 2;
a random number generator that generates a j-th random number bit string;
a mask generator that generates a j-th first mask and a j-th second mask based on the j-th random number bit string, a predetermined first mask and a predetermined second mask;
a pre-processor that outputs a first bit string based on an input ciphertext block;
the non-linear data converter of claim 1 as a j-th function calculator that performs a decoding calculation to a j-th bit string to output a (j+1)-th bit string; and
a post-processor that outputs a decoded sentence block based on a (Z+1)-th bit string.