Semiconductor device, moisture-resistant frame, groove and method of producing semiconductor device
View Patent ↗A semiconductor device provided on a semiconductor substrate includes an element region including an element, a moisture-resistant frame surrounding the element region, an insulating layer provided between the moisture-resistant frame and an outer peripheral edge of the semiconductor device and on the semiconductor substrate, a first metal line extending along the outer peripheral edge and provided in the insulating layer, and a groove provided in the insulating layer.
1. A semiconductor device comprising:
an element region having an element formed on a substrate;
a moisture-resistant frame surrounding the element region and defining the element region;
a periphery region being between an outer peripheral edge of the substrate and the moisture-resistant frame;
an insulating layer provided over the moisture-resistant frame, the element region and the periphery region;
a first metal line extending over the periphery region and provided in the insulating layer, the first metal line being separate from the moisture-resistant frame;
a second metal line extending over the periphery region and provided in the insulating layer, the second metal line being disposed between the first metal line and the substrate; and
a groove-shaped opening without being filled by a wire provided in the insulating layer, the groove-shaped opening being disposed over the first metal line, a bottom of the groove-shaped opening separating apart from the first metal line or reaching the first metal line
wherein a position of a side face of the first metal line faced to the moisture-resistant frame accords a position of a side face of the second metal line faced to the moisture-resistant frame.
2. The semiconductor device according to claim 1 , wherein the first metal line is arranged so as to surround the element region.
3. The semiconductor device according to claim 1 , wherein the first metal line includes irregularities provided at a side defining a planer shape of the first metal line.
4. The semiconductor device according to claim 1 , further comprising:
a third metal line provided in the insulating layer and in a region disposed between the first metal line and the outer peripheral edge.
5. The semiconductor device according to claim 1 , wherein the first metal line or the groove-shaped opening has a discontinuous portion.
6. The semiconductor device according to claim 1 , wherein a position of a side face of the first metal line at a side of the element region is aligned with a position of a side face of the groove-shaped opening at the side of the element region.
7. The semiconductor device according to claim 1 , further comprising:
a metal wiring having a width larger than the width of the first metal line, the metal wiring being disposed between the first metal line and the groove-shaped opening and under the groove-shaped opening.
8. The semiconductor device according to claim 1 , wherein the first metal line comprises a first wiring, a second wiring disposed under the first wiring, and a contact plug connecting to the first wiring to the second wiring.
9. The semiconductor device according to claim 2 , wherein a distance between a position of a side face of the first metal line, the side face being disposed at a side of an outer peripheral edge, and the outer peripheral edge is smaller than a distance between the position of a side face of the groove-shaped opening, the side face being disposed at the side of the outer peripheral edge, and the outer peripheral edge.
10. The semiconductor device according to claim 1 , further comprising:
a dummy pattern provided in the insulating layer between the first metal line and the outer peripheral edge.
11. The semiconductor device according to claim 1 , wherein the groove-shaped opening is arranged so as to surround the element region.