IP Library Granted Patent US 7,666,745
Granted Patent B2
US 7,666,745 · App. 12/054,684 · Granted Feb 23, 2010

Method of manufacturing a semiconductor device and a semiconductor device

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Quick Facts
Patent No.
US 7,666,745
App. No.
12/054,684
Granted
Feb 23, 2010
Kind
B2
Abstract

A method of manufacturing a semiconductor device, has forming a gate insulating film over a surface of a substrate, eliminating a portion of the gate insulating film in a region, forming a gate electrode over the gate insulating film and a drain electrode on the region, implanting first impurities into the substrate using the gate electrode and the drain electrode as a mask, forming an insulating film to fill the space between the gate electrode and the drain electrode, and implanting second impurities into the substrate to form a source region using the gate electrode, the drain electrode and the insulating film as a mask.

Claims (16)

1. A method of manufacturing a semiconductor device, comprising:

forming a gate insulating film over a surface of a substrate;

eliminating a portion of the gate insulating film in a region;

forming a gate electrode over the gate insulating film and a drain electrode on the region;

implanting first impurities into the substrate using the gate electrode and the drain electrode as a mask;

forming an insulating film to fill the space between the gate electrode and the drain electrode; and

implanting second impurities into the substrate to form a source region using the gate electrode, the drain electrode and the insulating film as a mask.

2. The method according to claim 1 , further comprising:

forming an impurity diffusion layer by diffusing the first or second impurities by a first heat treatment.

3. The method according to claim 2 , wherein the impurity diffusion layer having a smaller depth than the implanting depth of the second impurities in the substrate.

4. The method according to claim 1 , further comprising:

after forming the insulating film, forming a metal film over the substrate; and

forming a metal silicide on the surfaces of the source region, the gate electrode, and the drain electrode by a second heat treatment.

5. The method according to claim 1 , wherein implanting second impurities in the substrate is implanting the second impunities having a greater depth than the first impunities in the substrate.

6. The method according to claim 1 , wherein forming the gate electrode and the drain electrode includes poly silicon.

7. The method according to claim 1 , wherein forming the insulating film is depositing the insulating film over the substrate and etching the insulating film over the substrate by anisotropic etching.

Assignments (4)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 27, 2015
From: FUJITSU SEMICONDUCTOR LIMITED
To: SOCIONEXT INC.
Reel/Frame 035508/0637 →
CHANGE OF NAME Recorded Jul 9, 2010
From: FUJITSU MICROELECTRONICS LIMITED
To: FUJITSU SEMICONDUCTOR LIMITED
Reel/Frame 024651/0744 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 9, 2008
From: FUJITSU LIMITED
To: FUJITSU MICROELECTRONICS LIMITED
Reel/Frame 021976/0089 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 27, 2008
From: KURATA, HAJIME
To: FUJITSU LIMITED
Reel/Frame 020713/0200 →