Semiconductor variable capacitor and method of manufacturing the same
View Patent ↗The semiconductor variable capacitor includes a capacitor including an n-well 16 formed in a first region of a semiconductor substrate 10 , an insulating film 18 formed over the semiconductor substrate 10 and a gate electrode 20 n formed above the n-well 16 with the insulating film 18 interposed therebetween; and a p-well 14 of a second conduction type formed in a second region adjacent to the first region of the semiconductor substrate 10 . The gate electrode 20 n has an end which is extended to the second region and formed above the p-well 14 with the insulating film 18 interposed therebetween.
1. A semiconductor variable capacitor comprising:
a first well of a first conduction type formed a semiconductor substrate
a second well of a second conduction type formed in the semiconductor substrate adjacent to the first well;
an insulating film formed over the semiconductor substrate;
a gate electrode formed above the first well and the second well with the insulating film interposed therebetween;
a pair of first impurity diffused regions of the first conduction type provided in the first well, sandwiching the first well positioned below the gate electrode and electrically connected to the first well; and
a second impurity diffused region of the second conduction type provided in the second well, isolated from the pair of first impurity diffused regions and electronically connected to the second well.
2. The semiconductor variable capacitor according to claim 1 , wherein
a pair of the second wells is formed adjacent to each other with the first well sandwiched therebetween, and
the gate electrode have both ends extend respectively above the pair of the second wells with the insulating film interposed therebetween.
3. The semiconductor variable capacitor according to claim 1 , further comprising
a device isolation film for defining active regions, the first impurity diffused regions and the second impurity diffused region being formed in the respective active regions.
4. The semiconductor variable capacitor according to claim 1 , wherein
the gate electrode is of the first conduction type.
5. The semiconductor variable capacitor according to claim 1 , wherein
the gate electrode is of the second conduction type.
6. The semiconductor variable capacitor according to claim 1 , wherein
the gate electrode is formed of a metal material.
7. The semiconductor variable capacitor according to claim 1 , wherein
the first well or the second well is electrically isolated from the semiconductor substrate.
8. A semiconductor variable capacitor comprising:
a first well of a first conduction type formed in a semiconductor substrate;
an insulating film formed over the semiconductor substrate;
a gate electrode formed above the first well with the insulating film interposed therebetween;
a pair of first impurity diffused regions of the first conduction type provided in the first well, sandwiching the first well positioned below the gate electrode and electrically connected to the first well;
a second impurity diffused region of a second conduction type provided in the semiconductor substrate and isolated from the pair of first impurity diffused regions; and
a device isolation film for defining active regions, wherein
the first impurity diffused region and the second impurity diffused regions are formed in one active region.
9. The semiconductor variable capacitor according to claim 8 , further comprising:
a first metal silicide film formed on the first impurity diffused region; and
a second metal silicide film formed on the second impurity diffused region, wherein
the first metal silicide film and the second metal silicide film are formed, isolated from each other.
10. The semiconductor variable capacitor according to claim 8 , wherein
the gate electrode is of the first conduction type.
11. The semiconductor variable capacitor according to claim 8 , wherein
the gate electrode is of the second conduction type.
12. The semiconductor variable capacitor according to claim 8 , wherein
the gate electrode is formed of a metal material.
13. The semiconductor variable capacitor according to claim 8 , wherein
the first well or the second well is electrically isolated from the semiconductor substrate.
14. The semiconductor variable capacitor according to claim 8 , further comprising:
a second well of the second conduction type formed adjacent to the first well, wherein
the second impurity diffused region is formed in the second well and electrically connected to the second well, and
the gate electrode is extended over the second well.
15. The semiconductor variable capacitor according to claim 8 , wherein
the second impurity diffused region is formed in the first well.