IP Library Granted Patent US 7,777,311
Granted Patent B2
US 7,777,311 · App. 12/056,378 · Granted Aug 17, 2010

Circuit substrate, molding semiconductor device, tray and inspection socket

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Quick Facts
Patent No.
US 7,777,311
App. No.
12/056,378
Granted
Aug 17, 2010
Kind
B2
Abstract

Vias 7 penetrating a circuit substrate 2 or a seal ring 8 are provided on a part or the entire outer periphery of a molding semiconductor device 1 or in the cut region of the circuit substrate 2 , so that adhesion between a substrate and a core 2 C in the circuit substrate 2 is improved. Therefore, it is possible to suppress the exfoliation of the circuit substrate 2 , improving the yields.

Claims (54)

1. A circuit substrate including cut regions, electrode pads and a circuit region for division into a plurality of molded semiconductor devices by cutting the circuit substrate into separate cut regions after mounting a plurality of semiconductor chips on the circuit substrate and molding the semiconductor chips with resin, the circuit substrate, comprising:

a first substrate;

a second substrate;

a core between the first substrate and the second substrate;

at least one region on a first surface of the circuit substrate having a semiconductor chip mounted thereon;

external terminals formed on a second surface of the circuit substrate on a backside of the first surface and electrically connected to the semiconductor chip; and

penetrating members penetrating through the first substrate, the core and the second substrate;

wherein the penetrating members are located in a corner or an outer periphery of the circuit substrate to be close to a cut region, said corner or outer periphery positioned at an outer region of electrode pads and a circuit region.

2. The circuit substrate according to claim 1 , wherein the penetrating member is at least one via.

3. The circuit substrate according to claim 1 , wherein the penetrating member is continuous sealing located near an outer periphery of a region of the molded semiconductor device.

4. The circuit substrate according to claim 1 , wherein a penetrating member is located in each corner of a region of the molded semiconductor device.

5. The circuit substrate according to claim 2 , wherein a penetrating member is located in each corner of a region of the molded semiconductor device.

6. The circuit substrate according to claim 1 , wherein a penetrating member is located at each side of a region of the molded semiconductor device.

7. The circuit substrate according to claim 2 , wherein the penetrating member is located at each side of a region of the molded semiconductor device.

8. The circuit substrate according to claim 4 , wherein the penetrating member is located at each side of the region of the molded semiconductor device.

9. The circuit substrate according to claim 5 , wherein the penetrating member is located at each side of the region of the molded semiconductor device.

10. The circuit substrate according to claim 1 , wherein the penetrating member is located at a side of the cut region, the side being adjacent to the molded semiconductor device.

11. The circuit substrate according to claim 2 , wherein the penetrating member is located at a side of the cut region, the side being adjacent to the molded semiconductor device.

12. A circuit substrate for division into a plurality of molded semiconductor devices by cutting the circuit substrate into separate cut regions after mounting a plurality of semiconductor chips on the circuit substrate and molding the semiconductor chips with resin,

the circuit substrate, comprising:

a first substrate;

a second substrate;

a core between the first substrate and the second substrate;

at least one region on a first surface of the circuit substrate having a semiconductor chip mounted thereon;

external terminals formed on a second surface of the circuit substrate on a backside of the first surface and electrically connected to the semiconductor chip; and

penetrating members penetrating through the first substrate, the core and the second substrate of the circuit substrate;

wherein the penetrating member is located in a boundary of a region of the molded semiconductor device and the cut region.

13. A circuit substrate for division into a plurality of molded semiconductor devices by cutting the circuit substrate into separate cut regions after mounting a plurality of semiconductor chips on the circuit substrate and molding the semiconductor chips with resin,

the circuit substrate, comprising:

a first substrate;

a second substrate;

a core between the first substrate and the second substrate;

at least one region on a first surface of the circuit substrate having a semiconductor chip mounted thereon;

external terminals formed on a second surface of the circuit substrate on a backside of the first surface and electrically connected to the semiconductor chip; and

penetrating members penetrating through the first substrate, the core and the second substrate of the circuit substrate;

wherein the penetrating member is located at a boundary of a region of the molded semiconductor device and the cut region, and the penetrating member is at least one via.

14. A circuit substrate for division into a plurality of molded semiconductor devices by cutting the circuit substrate into cut regions after mounting a plurality of semiconductor chips on the circuit substrate and molding the semiconductor chips with resin,

the circuit substrate, comprising:

a first substrate;

a second substrate;

a core interposed between the first substrate and the second substrate;

at least one region on a first surface having a semiconductor chip mounted thereon; and

external terminals formed on a second surface on a backside of the first surface and electrically connected to the semiconductor chip, wherein the circuit substrate is partially removed.

15. The circuit substrate according to claim 14 , wherein when the circuit substrate is partially removed, the core and one of the first and second substrates are removed in a predetermined range on corners of a region of the molded semiconductor device.

16. The circuit substrate according to claim 14 , wherein when the circuit substrate is partially removed, ends of the circuit substrate are diagonally removed from the surface for mounting the semiconductor chip to the surface for forming the external terminals, toward an inside of the molded semiconductor device.

17. A molded semiconductor device formed by mounting a semiconductor chip on a first surface of a circuit substrate according to any one of claims 1 to 16 while electrically connecting the semiconductor chip to the first surface, and cutting the circuit substrate into the cut regions.

18. A tray for storing a molded semiconductor device in which a semiconductor chip is mounted on a first surface of a circuit substrate while electrically connected to the first surface, external terminals electrically connected to the semiconductor chip are provided on a second surface on a backside of the first surface, and the first surface having the semiconductor chip mounted thereon is molded with resin, the tray comprising:

a bottom surface contacting the external terminals; and

a first projection on a side surface and contacting two opposed surfaces formed by the resin,

wherein the molded semiconductor device is held by three points including the external terminals and two opposed surfaces formed by the resin.

19. An inspection socket for storing a molded semiconductor device in which a semiconductor chip is mounted on a first surface of a circuit substrate while electrically connected to the first surface, external terminals electrically connected to the semiconductor chip are provided on a second surface on a backside of the first surface, and the first surface having the semiconductor chip mounted thereon is molded with resin, the inspection socket comprising:

a bottom surface contacting the external terminals; and

a first projection on a side surface and contacting two opposed surfaces formed by the resin,

wherein the molded semiconductor device is held by three points including the external terminals and two opposed surfaces formed by the resin.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 27, 2020
From: PANASONIC CORPORATION
To: PANASONIC SEMICONDUCTOR SOLUTIONS CO., LTD.
Reel/Frame 052755/0917 →
CHANGE OF NAME Recorded Nov 3, 2008
From: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
To: PANASONIC CORPORATION
Reel/Frame 021779/0851 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 18, 2008
From: UTSUMI, MASAKI; TAKATA, TAKASHI; IIDAKA, MASAHIRO
To: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
Reel/Frame 021259/0619 →