INTEGRATED CONDUCTIVE SHIELD FOR MICROELECTRONIC DEVICE ASSEMBLIES AND ASSOCIATED METHODS
Microelectronic device assemblies having integrated conductive shields are disclosed herein. The microelectronic device assemblies include a semiconductor substrate having a bond site and a solder ball electrically connected to the bond site, a dielectric sidewall at least partially encapsulating the semiconductor substrate, and a conductive shield in direct contact with the sidewall and in electrical communication with the solder ball and the bond site.
1 . A microelectronic device assembly, comprising:
a semiconductor substrate having a bond site and a solder ball electrically connected to the bond site;
a dielectric sidewall at least partially encapsulating the semiconductor substrate; and
a conductive shield in direct contact with the sidewall and in electrical communication with the solder ball and the bond site.
2 . The microelectronic device assembly of claim 1 wherein the conductive shield includes a layer of conductive material plated onto the sidewall.
3 . The microelectronic device assembly of claim 1 , further comprising an objective lens attached to the semiconductor substrate, wherein the conductive shield includes a layer of conductive material plated onto the dielectric sidewall and side surfaces of the objective lens.
4 . The microelectronic device assembly of claim 3 wherein the conductive shield includes a first portion plated onto the objective lens and a second portion plated onto the sidewall, the first portion being transverse to the second portion.
5 . The microelectronic device assembly of claim 3 wherein the sidewall is a first sidewall, and wherein the microelectronic device assembly further includes a second sidewall encapsulating the first sidewall, and wherein the conductive shield includes a layer of conductive material between the first and second sidewalls.
6 . The microelectronic device assembly of claim 1 , further comprising an objective lens attached to the semiconductor substrate, wherein the sidewall at least partially encapsulates the semiconductor substrate and the objective lens, and wherein the conductive shield includes a layer of conductive material plated onto side surfaces of the sidewall.
7 . The microelectronic device assembly of claim 6 wherein the sidewall includes a first surface proximate to the objective lens and the semiconductor substrate and a second surface opposite the first surface, and wherein the layer of conductive material is plated onto the second surface.
8 . A microelectronic device assembly, comprising:
a semiconductor substrate carrying a bond site proximate to a first surface, a solder ball attached to a second surface opposite the first surface, and a via electrically connecting the bond site to the solder ball;
a dielectric sidewall at least partially encapsulating the semiconductor substrate;
a layer of conductive material in direct contact with the dielectric sidewall; and
a conductive interconnect extending between the bond site and the layer of conductive material through the dielectric sidewall.
9 . The microelectronic device assembly of claim 8 wherein the bond site is a first bond site, and wherein the semiconductor substrate includes a second bond site adjacent to the first bond site, and wherein the sidewall is interposed between the second bond site and the layer of conductive material.
10 . The microelectronic device assembly of claim 8 wherein the conductive interconnect is a stud bump extending through the dielectric sidewall from the bond site and in direct contact with the layer of conductive material.
11 . The microelectronic device assembly of claim 10 wherein the stud bump extends beyond the layer of conductive material.
12 . The microelectronic device assembly of claim 8 wherein the sidewall is a first dielectric sidewall, and wherein the imager assembly further includes a second dielectric sidewall encapsulating the layer of conductive material, the conductive interconnect, the first dielectric sidewall, and the semiconductor substrate.
13 . The microelectronic device assembly of claim 8 wherein the conductive interconnect includes a portion of a wirebond extending at least partially outwardly away from the objective lens and toward the layer of conductive material.
14 . The microelectronic device assembly of claim 13 wherein the portion of the wirebond includes a first end carried by the bond site and a second end opposite the first end, the second end being in direct contact with the layer of conductive material.
15 . The microelectronic device assembly of claim 13 wherein the wirebond includes a first end carried by the bond site and a second end opposite the first end, the second end being generally flush with a surface of the dielectric sidewall, and wherein the layer of conductive material is in direct contact with the surface of the sidewall and the second end of the wirebond.
16 . The microelectronic device assembly of claim 13 wherein the wirebond includes a first end carried by the bond site and a second end opposite the first end, the second end being exposed from the sidewall and in direct contact with the layer of conductive material.
17 . A process for forming a microelectronic device assembly, comprising:
forming a conductive interconnect on a bond site carried by a microelectronic device;
encapsulating the bond site and the conductive interconnect with a dielectric sidewall;
controlling an amount of the dielectric sidewall such that the conductive interconnect extends beyond the dielectric sidewall; and
depositing a layer of conductive material onto the conductive interconnect and the dielectric sidewall.
18 . The process of claim 17 wherein forming a conductive interconnect includes forming a stud bump on the bond site.
19 . The process of claim 17 wherein depositing a layer of conductive material includes directly contacting the conductive interconnect with the layer of conductive material.
20 . The process of claim 17 wherein controlling an amount of the dielectric sidewall includes controlling an amount of the dielectric sidewall such that a height of the conductive interconnect is not less than a height of the dielectric sidewall.
21 . The process of claim 17 wherein the dielectric sidewall is a first dielectric sidewall, and wherein the process further includes encapsulating the layer of conductive material, the conductive interconnect, the first dielectric sidewall, and the microelectronic device with a second dielectric sidewall.
22 . A process for forming a microelectronic device assembly, comprising:
forming a first microelectronic device adjacent to a second microelectronic device on a workpiece, the first microelectronic device having a first bond site and the second microelectronic device having a second bond site;
forming a conductive link between the first bond site and the second bond site;
encapsulating the first and second microelectronic devices and the conductive link with a dielectric sidewall;
severing the conductive link into a first conductive interconnect and a second conductive interconnect; and
depositing a layer of conductive material onto the dielectric sidewall such that the layer of conductive material is in direct contact with the first and second conductive interconnects.
23 . The process of claim 22 wherein forming a conductive link includes disposing a wirebond between the first and second bond sites.
24 . The process of claim 22 wherein severing the conductive link includes partially singulating the workpiece and removing a portion of the dielectric sidewall.
25 . The process of claim 22 wherein depositing a layer of conductive material includes coating the dielectric sidewall with a layer of copper, aluminum, or nickel with a thickness of about 1 micrometer to about 10 micrometers.