Capacitive isolator
View Patent ↗An integrated circuit provides high voltage isolation capabilities. The circuit includes a first area containing a first group of functional circuitry located in a substrate of the integrated circuit. This circuit also includes a second area containing a second group of functional circuitry also contained within the substrate of the integrated circuit. Capacitive isolation circuitry located in the conductive layers in the integrated circuit provide a high voltage isolation link between the first group of functional circuitry and the second group of functional circuitry. The capacitive isolation circuitry distributes a first portion of the high voltage isolation signal across the first group of capacitors in the capacitive isolation circuitry and distributes a second portion of the high voltage isolation circuitry across the second group of capacitors in the capacitive isolation circuitry.
1. An integrated circuit having voltage isolation capabilities, comprising:
a first area of the integrated circuit containing functional circuitry, the functional circuitry located in a substrate of the integrated circuit; and
a second area of the integrated circuit containing integrated capacitive isolation circuitry for voltage isolating the functional circuitry, the capacitive isolation circuitry located in conductive layers of the integrated circuit wherein the capacitive isolation circuitry further comprises:
a first voltage isolation capacitor including:
a first plate comprising a first plate of the first voltage isolation capacitor located on a first conductive layer, the first plate connected to the functional circuitry; and
a second plate comprising a second plate of the first voltage isolation capacitor located on a second conductive layer and capacitively coupled thereto, the second plate connected to the a first output of integrated circuit; and
a second voltage isolation capacitor including:
a third plate comprising a first plate of the second voltage isolation capacitor located on the first conductive layer, the first plate connected to the functional circuitry;
a fourth plate comprising a second plate of the second voltage isolation capacitor located on the second conductive layer and capacitively coupled thereto, the fourth plate connected to a second output of the integrated circuit; and
transceiver circuitry connected to the first plate of the first voltage isolation capacitor and the third plate of the second voltage isolation capacitor for selectively transmitting and receiving an AC signal at the first and second outputs of the integrated circuit across the first and second voltage isolation capacitors.
2. The integrated circuit of claim 1 , wherein the first conductive layer and the second conductive layer are separated by at least one dielectric layer.
3. The integrated circuit of claim 1 , wherein the integrated circuit comprises at least five spatially ordered metal layers, the first conductive layer being the second metal layer of the at least five metal layers and the second conductive layer being the fifth metal layer of the at least five metal layers.
4. The integrated circuit of claim 1 , wherein the second area of the integrated circuit includes a plurality of capacitive isolation circuitries.
5. The integrated circuit of claim 1 , wherein the transceiver circuitry further comprises:
a differential transmitter for transmitting the AC signal to the first and second voltage isolation capacitors; and
a differential receiver for receiving the AC signal from the first and second voltage isolation capacitors.
6. The integrated circuit of claim 5 , wherein the differential transmitter further comprises:
first circuitry for transmitting the AC signal on the first voltage isolation capacitor responsive to the applied AC signal and an applied data signal; and
second circuitry for transmitting the AC signal phase shifted from the AC signal transmitted from the first circuitry on the second voltage isolation capacitor responsive to the applied AC signal and the applied data signal.
7. The integrated circuit of claim 5 , wherein the first circuitry and the second circuitry included a transmission gate for disabling transmissions from the first circuitry and the second circuitry respectively.
8. The integrated circuit of claim 5 , wherein the differential receiver further comprises:
a common mode clamp connected to each of the first voltage isolation capacitor and the second voltage isolation capacitor to prevent nodes associated with the capacitors from floating; and
a receiver amplifier connected to the first voltage isolation capacitor and the second voltage isolation capacitor for detecting the transmitted AC signal from the first voltage isolation capacitor and for detecting the transmitted AC signal offset from the transmitted AC signal on the first capacitor from the second voltage isolation capacitor.
9. The integrated circuit of claim 1 , wherein the first output and the second output of the integrated circuit comprise a connection pad located above the second plate and the fourth plate respectively.
10. The integrated circuit of claim 1 , wherein the first output and the second output of the integrated circuit comprise at least one of the first plate, the second plate, the third plate and the fourth plate.
11. The integrated circuit of claim 1 , wherein the first voltage isolation capacitor and the second voltage isolation capacitor comprises at least one of a horizontal capacitor, a vertical capacitor or a combination thereof.
12. The integrated circuit of claim 1 , wherein the AC signal may be selectively established for the transceiver circuitry.