Digitally controlled oscillator and associated method
A digitally controlled capacitor includes a first set of N capacitors, wherein the first set has a first capacitance value and each of the M capacitors has a second capacitance value, and at least one second set of N capacitors. The second set has the first capacitance value and each of the N capacitors has a third capacitance value that is greater than the second capacitance value. M and N are integers greater than one and M is not equal to N.
1. A digitally controlled capacitor comprising:
a first set of M capacitors, wherein the first set has a first capacitance value and each of the M capacitors has a second capacitance value; and
at least one second set of N capacitors, wherein the second set has the first capacitance value and each of the N capacitors has a third capacitance value that is greater than the second capacitance value,
wherein M and N are integers greater than one and M is not equal to N.
2. The digitally controlled capacitor of claim 1 wherein the second capacitance value is approximately one half of the third capacitance value and N is one half of M.
3. The digitally controlled capacitor of claim 1 further comprising a third set of P capacitors, wherein the third set has the first capacitance value and each of the P capacitors has a fourth capacitance value that is greater than the third capacitance value.
4. The digitally controlled capacitor of claim 3 wherein the third capacitance value is approximately one half of the fourth capacitance value and P is one half of N.
5. The digitally controlled capacitor of claim 1 further comprising:
a first set of M switches that are each associated with a respective one of the M capacitors; and
a second set of N switches that are each associated with a respective one of the N capacitors.
6. The digitally controlled capacitor of claim 5 wherein each of the M and N switches includes a transistor and further comprising:
a level shifter that shifts gate levels of each of the transistors.
7. The digitally controlled capacitor of claim 1 further comprising:
a first shift register associated with the first set that provides a first control signal to the first set; and
at least one second shift register associated with the at least one second set that provides a second control signal to the second set.
8. The digitally controlled capacitor of claim 7 wherein the first and second shift registers store logical values that selectively determine states of the M capacitors and the N capacitors, respectively.