Method for producing a radiation-emitting-and-receiving semiconductor chip
View Patent ↗A method for producing an integrated semiconductor component comprising a first semiconductor layer construction for emitting radiation and a second semiconductor layer construction for receiving radiation, wherein a substrate is first provided and a first semiconductor layer sequence containing a radiation-generating region is deposited epitaxially on the substrate. A second semiconductor layer sequence containing a radiation-absorbing region is subsequently deposited epitaxially on the first semiconductor layer sequence. The second semiconductor layer sequence is then patterned in order to uncover a first location and a second location. A first semiconductor layer construction is electrically insulated from a second semiconductor layer construction. Finally, a first contact layer is applied to a free surface of the substrate and a second contact layer is applied at least to the first and second locations for contact-connection.
1. A method for producing an integrated semiconductor component comprising a first semiconductor layer construction for emitting radiation and a second semiconductor layer construction for receiving radiation, comprising:
(a) providing a substrate;
(b) epitaxially depositing a first semiconductor layer sequence, which contains a radiation-generating region, onto the substrate and a second semiconductor layer sequence, which contains a radiation-absorbing region, onto the first semiconductor layer sequence;
(c) patterning the second semiconductor layer sequence, or both semiconductor layer sequences, in order to uncover at least one first location for electrical contact-connection on that surface of the first semiconductor layer sequence which is remote from the substrate, and at least one second location for electrical contact-connection on that surface of the second semiconductor layer sequence which is remote from the substrate;
(d) electrically insulating the first semiconductor layer construction, which has the first semiconductor layer sequence and is arranged between the substrate and the first location for contact-connection, from the second semiconductor layer construction, which has the first and the second semiconductor layer sequence and is arranged between the substrate and the second location for contact-connection; and
(e) applying of a first contact layer to the free surface of the substrate and a second contact layer at least to the first and second locations for contact-connection.
2. The method according to claim 1 ,
wherein
prior to method step (e), a passivation layer, which is electrically insulating, is at least partially applied to the free surfaces of the first and second semiconductor layer construction that are remote from the substrate, the first and second locations for contact-connection being left free in this case; and
in method step (e), the second contact layer is applied to the first and second locations for contact-connection and at least partially to the passivation layer.
3. The method according to claim 1 ,
wherein the insulation in method step (d) is effected by means of implantation or removal of a region, lying between the first and second semiconductor layer constructions, of the first semiconductor layer sequence or the first and second semiconductor layer sequences which at least adjoins the substrate.
4. The method according to claim 3 ,
wherein the surface of the substrate that is uncovered by the removal of the region and at least a part of the surface of the semiconductor layer sequences that is uncovered by the removal of the region are covered, in method step (e), with the second or a third contact layer in order to produce an electrical connection between the first and said second or third contact layer.
5. The method according to claim 1 ,
wherein the first, second and/or, if appropriate, a third contact layer are/is formed as a layer sequence.
6. The method according to claim 1 ,
wherein the first, second and, if appropriate, a third contact layer have the same composition, in each case a mutually different composition or partly different compositions.
7. The method according to claim 1 ,
wherein, prior to method step (e) and, if appropriate, prior to the application of a passivation layer, a current constriction layer is introduced into the first semiconductor layer sequence of the first semiconductor layer construction between the radiation-generating region and the first location for contact-connection.
8. The method according to claim 1 ,
wherein, in method step (c), the second semiconductor layer construction is patterned in such a way that a mesa structure is formed, the side areas of which extend from the second semiconductor layer sequence as far as the first semiconductor layer sequence.
9. The method according to claim 1 ,
wherein, in method step (b), a filter layer is additionally deposited epitaxially onto the second semiconductor layer sequence.
10. The method according to claim 1 ,
wherein, in method step (c), the patterning is effected by means of etching.
11. The method according to claim 1 ,
wherein, in method step (c), the first semiconductor layer construction is patterned in such a way that a mesa structure is formed, the side areas of which extend from the first semiconductor layer sequence as far as the semiconductor layers that lie between the substrate and the radiation-generating region.