IP Library Granted Patent US 7,486,579
Granted Patent B2
US 7,486,579 · App. 12/073,017 · Granted Feb 3, 2009

Method for controlling a semiconductor apparatus

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Quick Facts
Patent No.
US 7,486,579
App. No.
12/073,017
Granted
Feb 3, 2009
Kind
B2
Abstract

A system in which an overdrive period in a DRAM may be provided without providing for accurate delay time. There are provided MOS transistor TP 1 , capacitor C 1 , MOS transistor TP 2 , and control circuit. MOS transistor TP 1 is turned on when overdriving begins, and is designed to supply voltage of power supply VDD 1 to parallel-connected sense amplifiers. Capacitor C 1 accumulates electrical charges referenced to in association with electrical charges supplied to sense the amplifiers via MOS transistor TP 1 . MOS transistor TP 2 is turned on when overdriving begins, to supply voltage of power supply VDD 1 to capacitor C 1 . The control circuit controls so that MOS transistors TP 1 , TP 2 are turned off when the capacitor potential has reached voltage VREF 1 . There is also provided a MOS transistor turned on after the MOS transistors TP 1 , TP 2 are turned off to supply a power supply voltage equal to the voltage VREF 1 to the plural sense amplifiers.

Claims (13)

1. A method for controlling a semiconductor apparatus, comprising:

providing a semiconductor apparatus including a plurality of sense amplifiers based on an overdrive system,

wherein said overdrive system comprising:

a first switch device interconnecting said sense amplifiers connected in parallel and a first power supply;

a replica circuit which copies operation of the first switch device,

a control circuit which compares a first reference voltage and an output of the replica circuit,

a second switch device interconnecting said sense amplifiers and a second power supply;

the method further comprising:

a) before an overdrive operation, cutting off the first switch device and the second switch device to disable the control circuit and the replica circuit;

b) starting an overdrive operation by activating the control circuit to turn on the first switch device and to activate the replica circuit so as to overdrive the sense amplifiers;

c) turning off by the control circuit, the first switch device to disable the replica circuit, when an output voltage of the replica circuit reaches a first reference voltage; and

d) ending the overdrive operation by turning on the second switch device to maintain the sense amplifiers at a potential of the second power supply.

2. The method according to claim 1 , wherein the replica circuit comprises a third switch device and a capacitive device, wherein the replica circuit is activated by turning on the third switch device.

Assignments (7)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 3, 2021
From: LONGITUDE LICENSING LIMITED
To: NVIDIA CORPORATION
Reel/Frame 057182/0283 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 24, 2021
From: TSUKADA, SHUICHI
To: ELPIDA MEMORY, INC.
Reel/Frame 056333/0148 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 21, 2018
From: LONGITUDE SEMICONDUCTOR S.A.R.L.
To: LONGITUDE LICENSING LIMITED
Reel/Frame 046867/0248 →
CHANGE OF NAME Recorded Aug 24, 2016
From: PS5 LUXCO S.A.R.L.
To: LONGITUDE SEMICONDUCTOR S.A.R.L.
Reel/Frame 039793/0880 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 24, 2016
From: PS4 LUXCO S.A.R.L.
To: PS5 LUXCO S.A.R.L.
Reel/Frame 039818/0506 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 15, 2014
From: ELPIDA MEMORY, INC.
To: PS4 LUXCO S.A.R.L.
Reel/Frame 032899/0588 →
SECURITY AGREEMENT Recorded Jul 29, 2013
From: PS4 LUXCO S.A.R.L.
To: ELPIDA MEMORY INC.
Reel/Frame 032414/0261 →