Resistance variable memory with temperature tolerant materials

1. A memory device comprising:

a first electrode;

a second electrode;

a Sb 2 Se 3 glass layer between said first electrode and said second electrode;

a metal-chalcogenide layer between said Sb 2 Se 3 glass layer and said second electrode,

a first chalcogenide glass layer between said metal-chalcogenide layer and said second electrode;

a metal-containing layer between said first chalcogenide glass layer and said second electrode; and

a second chalcogenide glass layer between said metal-containing layer and said second electrode.

2. The memory device of claim 1 , wherein said metal-chalcogenide layer comprises Ag 2 Se, wherein said first chalcogenide glass layer and said second chalcogenide glass layer, comprise Ge 40 Se 60 , and wherein said metal-containing layer comprises at least one of silver and antimony.

3. A memory device, comprising:

a substrate;

a conductive address line over said substrate;

a first electrode over said conductive address line;

a Sb 2 Se 3 glass layer over said first electrode;

a metal-chalcogenide layer over said Sb 2 Se 3 glass layer;

a first chalcogenide glass layer over said metal-chalcogenide layer;

a metal layer over said first chalcogenide glass layer;

a second chalcogenide glass layer over said metal layer; and

a second electrode over said second chalcogenide glass layer.

4. The memory device of claim 3 , wherein said first electrode comprises tungsten.

5. The memory device of claim 3 , wherein said second electrode comprises tungsten.

6. The memory device of claim 3 , wherein said metal-chalcogenide layer comprises tin selenide.

7. The memory device of claim 3 , wherein said metal-chalcogenide layer comprises silver selenide.

8. The memory device of claim 3 , wherein said metal-chalcogenide layer comprises Ag 2 Se, wherein said first chalcogenide glass layer and said second chalcogenide glass layer, comprise Ge 40 Se 60 , and wherein said metal-containing layer comprises at least one of antimony and silver.

9. The memory device of claim 3 , wherein said Sb 2 Se 3 glass layer, said metal-chalcogenide layer, said first and second chalcogenide layer, said metal layer, and said second electrode are provided within a via.

10. The memory device of claim 3 , wherein said second electrode defines the location of said memory device over said substrate.

11. The memory device of claim 3 , wherein said memory device is a PCRAM device.

12. The memory device of claim 3 , wherein said Sb2Se3 glass layer has a conducting channel therein.

13. The memory device of claim 3 , wherein said conducting channel comprises material from said metal-chalcogenide layer.

14. The memory device of claim 3 , wherein a conductive pathway within said Sb 2 Se 3 glass layer provides a higher conductivity memory state for said memory device.

15. The memory device of claim 14 , wherein said conductive pathway comprises silver.