IP Library Granted Patent US 7,611,947
Granted Patent B2
US 7,611,947 · App. 12/076,952 · Granted Nov 3, 2009

Method of manufacturing semiconductor device

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Quick Facts
Patent No.
US 7,611,947
App. No.
12/076,952
Granted
Nov 3, 2009
Kind
B2
Abstract

A method of manufacturing a semiconductor device of the present invention consists of forming a trench in a trench-type cell transistor region; forming a gate insulating film and a gate material layer on a semiconductor substrate; forming a photoresist layer on the semiconductor substrate so as to expose extension region formation portions of the trench-type cell transistor region and a high breakdown voltage transistor region; forming extension regions in each region by performing ion implantation in the semiconductor substrate surface of the trench-type cell transistor region and the high breakdown voltage transistor region and then patterning gates, and forming extension regions of an ordinary breakdown voltage transistor by covering the trench-type cell transistor region and the high breakdown voltage transistor region with a photoresist layer and implanting ions in the ordinary breakdown voltage transistor region.

Claims (10)

1. A method of manufacturing a semiconductor device in which a trench-type transistor, a high breakdown voltage transistor, and an ordinary breakdown voltage transistor are provided on a semiconductor substrate, comprising the steps of:

forming element isolation layers on a surface of a semiconductor substrate for isolating a trench-type transistor, a high breakdown voltage transistor, and an ordinary breakdown voltage transistor;

forming a trench in a trench-type transistor region;

forming a gate insulating film and a gate material layer on the semiconductor substrate and in the trench;

forming a first photoresist layer on the semiconductor substrate so as to expose extension region formation portions of the trench-type transistor region and the high breakdown voltage transistor region;

forming extension regions of the trench-type transistor and the high breakdown voltage transistor by performing ion implantation in the trench-type transistor region and the high breakdown voltage transistor region;

forming a second photoresist layer on the semiconductor substrate so as to cover the trench-type transistor region and the high breakdown voltage transistor region and expose the ordinary breakdown voltage transistor region; and

forming extension regions of the ordinary breakdown voltage transistor by implanting ions in the ordinary breakdown voltage transistor region.

2. The method of manufacturing a semiconductor device according to claim 1 , wherein ion implantation is performed in the extension region formation portions after covering the ordinary breakdown voltage transistor region and a channel portion of the high breakdown voltage transistor region with a photoresist layer.

3. The method of manufacturing a semiconductor device according to claim 1 , wherein gate electrodes are formed by patterning the gate insulating film and the gate material layer after forming the extension regions in the trench-type transistor region and the high breakdown voltage transistor region.

Assignments (5)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 21, 2018
From: LONGITUDE SEMICONDUCTOR S.A.R.L.
To: LONGITUDE LICENSING LIMITED
Reel/Frame 046867/0248 →
CHANGE OF NAME Recorded Aug 24, 2016
From: PS5 LUXCO S.A.R.L.
To: LONGITUDE SEMICONDUCTOR S.A.R.L.
Reel/Frame 039793/0880 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 24, 2016
From: PS4 LUXCO S.A.R.L.
To: PS5 LUXCO S.A.R.L.
Reel/Frame 039818/0506 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 15, 2014
From: ELPIDA MEMORY, INC.
To: PS4 LUXCO S.A.R.L.
Reel/Frame 032895/0466 →
SECURITY AGREEMENT Recorded Jul 29, 2013
From: PS4 LUXCO S.A.R.L.
To: ELPIDA MEMORY INC.
Reel/Frame 032414/0261 →